Searched refs:pll_loopdiv (Results 1 – 4 of 4) sorted by relevance
1489 .io.pll_loopdiv = 20,1780 .io.pll_loopdiv = 6,1813 u32 pll_loopdiv; /* New prediv */ member1851 pll.pll_ratio = adc_table->pll_loopdiv; in dib8096p_agc_startup()2032 .io.pll_loopdiv = 8,2051 .io.pll_loopdiv = 8,2067 .io.pll_loopdiv = 8,2247 u32 pll_loopdiv; member2263 adc->pll_loopdiv = loopdiv; in dib7090p_get_best_sampling()2303 adc->pll_loopdiv = loopdiv; in dib7090p_get_best_sampling()[all …]
365 u16 pll_loopdiv, u16 free_div, u16 dsuScaler) in dib0700_set_clock() argument380 st->buf[4] = (pll_loopdiv >> 8) & 0xff; /* MSB */ in dib0700_set_clock()381 st->buf[5] = pll_loopdiv & 0xff; /* LSB */ in dib0700_set_clock()
24 u8 pll_loopdiv:6; member
550 …if ((PllCfg & 0x1FFF) != ((cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_pr… in dib0090_reset_digital()562 …PllCfg = (1 << 15) | (0 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io… in dib0090_reset_digital()622 …if ((PllCfg & 0x1FFF) != ((cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_pr… in dib0090_fw_reset_digital()633 …PllCfg = (1 << 15) | (0 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io… in dib0090_fw_reset_digital()