Searched refs:pll1 (Results 1 – 3 of 3) sorted by relevance
| /linux-3.4.99/arch/avr32/boards/favr-32/ |
| D | setup.c | 265 struct clk *pll1; in set_abdac_rate() local
277 pll1 = clk_get(NULL, "pll1"); in set_abdac_rate()
278 if (IS_ERR(pll1)) { in set_abdac_rate()
279 retval = PTR_ERR(pll1); in set_abdac_rate()
289 retval = clk_set_parent(pll1, osc1); in set_abdac_rate()
299 retval = clk_round_rate(pll1, in set_abdac_rate()
304 retval = clk_set_rate(pll1, retval); in set_abdac_rate()
308 retval = clk_set_parent(abdac, pll1); in set_abdac_rate()
315 clk_put(pll1); in set_abdac_rate()
|
| /linux-3.4.99/drivers/gpu/drm/nouveau/ |
| D | nouveau_hw.c | 224 uint32_t pll1 = (oldpll1 & 0xfff80000) | pv->log2P << 16 | pv->NM1; in setPLL_double_highregs() local
233 pll1 = (pll1 & 0xfcc7ffff) | (pv->N2 & 0x18) << 21 | in setPLL_double_highregs()
248 pll1 = (pll1 & 0x7fffffff) | (single_stage ? 0x4 : 0xc) << 28; in setPLL_double_highregs()
250 if (oldpll1 == pll1 && oldpll2 == pll2) in setPLL_double_highregs()
284 NVWriteRAMDAC(dev, 0, reg1, pll1); in setPLL_double_highregs()
394 nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1, in nouveau_hw_decode_pll() argument
402 pllvals->log2P = (pll1 >> 16) & 0x7; in nouveau_hw_decode_pll()
408 if (!(pll1 & 0x1100)) in nouveau_hw_decode_pll()
411 pllvals->NM1 = pll1 & 0xffff; in nouveau_hw_decode_pll()
416 if (pll1 & NV30_RAMDAC_ENABLE_VCO2) { in nouveau_hw_decode_pll()
[all …]
|
| /linux-3.4.99/arch/avr32/mach-at32ap/ |
| D | at32ap700x.c | 316 static struct clk pll1 = { variable
572 if (parent == &osc1 || parent == &pll1) in genclk_set_parent()
579 if (parent == &pll0 || parent == &pll1) in genclk_set_parent()
599 parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; in genclk_init_parent()
2204 &pll1,
2280 pll1.parent = &osc1; in setup_platform()
|