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Searched refs:nv_wr08 (Results 1 – 6 of 6) sorted by relevance

/linux-3.4.99/drivers/gpu/drm/nouveau/
Dnv04_dac.c157 nv_wr08(dev, NV_PRMDIO_READ_MODE_ADDRESS, 0x0); in nv04_dac_detect()
161 nv_wr08(dev, NV_PRMDIO_PIXEL_MASK, 0); in nv04_dac_detect()
174 nv_wr08(dev, NV_PRMDIO_WRITE_MODE_ADDRESS, 0); in nv04_dac_detect()
175 nv_wr08(dev, NV_PRMDIO_PALETTE_DATA, 0); in nv04_dac_detect()
176 nv_wr08(dev, NV_PRMDIO_PALETTE_DATA, 0); in nv04_dac_detect()
178 nv_wr08(dev, NV_PRMDIO_PALETTE_DATA, blue); in nv04_dac_detect()
201 nv_wr08(dev, NV_PRMDIO_PIXEL_MASK, saved_palette_mask); in nv04_dac_detect()
203 nv_wr08(dev, NV_PRMDIO_WRITE_MODE_ADDRESS, 0); in nv04_dac_detect()
205 nv_wr08(dev, NV_PRMDIO_PALETTE_DATA, saved_palette0[i]); in nv04_dac_detect()
Dnouveau_hw.h188 nv_wr08(dev, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index); in NVWriteVgaCrtc()
189 nv_wr08(dev, NV_PRMCIO_CR__COLOR + head * NV_PRMCIO_SIZE, value); in NVWriteVgaCrtc()
196 nv_wr08(dev, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index); in NVReadVgaCrtc()
258 nv_wr08(dev, reg, value); in NVWritePRMVIO()
264 nv_wr08(dev, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, enable ? 0 : 0x20); in NVSetEnablePalette()
284 nv_wr08(dev, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, index); in NVWriteVgaAttr()
285 nv_wr08(dev, NV_PRMCIO_AR__WRITE + head * NV_PRMCIO_SIZE, value); in NVWriteVgaAttr()
298 nv_wr08(dev, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, index); in NVReadVgaAttr()
Dnv40_pm.c242 nv_wr08(dev, 0x0c03c4 + (i * 0x2000), 0x01); in nv40_pm_clocks_set()
285 nv_wr08(dev, 0x0c03c4 + (i * 0x2000), 0x01); in nv40_pm_clocks_set()
286 nv_wr08(dev, 0x0c03c5 + (i * 0x2000), sr1[i] | 0x20); in nv40_pm_clocks_set()
337 nv_wr08(dev, 0x0c03c4 + (i * 0x2000), 0x01); in nv40_pm_clocks_set()
338 nv_wr08(dev, 0x0c03c5 + (i * 0x2000), sr1[i]); in nv40_pm_clocks_set()
Dnouveau_irq.c60 nv_wr08(dev, 0x00088068, 0xff); in nouveau_irq_postinstall()
95 nv_wr08(dev, 0x00088068, 0xff); in nouveau_irq_handler()
Dnouveau_hw.c1034 nv_wr08(dev, NV_PRMDIO_PIXEL_MASK + head_offset, in nv_save_state_palette()
1036 nv_wr08(dev, NV_PRMDIO_READ_MODE_ADDRESS + head_offset, 0x0); in nv_save_state_palette()
1052 nv_wr08(dev, NV_PRMDIO_PIXEL_MASK + head_offset, in nouveau_hw_load_state_palette()
1054 nv_wr08(dev, NV_PRMDIO_WRITE_MODE_ADDRESS + head_offset, 0x0); in nouveau_hw_load_state_palette()
1057 nv_wr08(dev, NV_PRMDIO_PALETTE_DATA + head_offset, in nouveau_hw_load_state_palette()
Dnouveau_drv.h1596 static inline void nv_wr08(struct drm_device *dev, unsigned reg, u8 val) in nv_wr08() function