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Searched refs:mux_reg (Results 1 – 18 of 18) sorted by relevance

/linux-3.4.99/arch/arm/plat-spear/
Dpadmux.c30 struct pmx_reg mux_reg; member
79 val = readl(pmx->base + pmx->mux_reg.offset); in pmx_devs_enable()
106 mask = devs[i]->modes[j].mask & pmx->mux_reg.mask; in pmx_devs_enable()
114 writel(val, pmx->base + pmx->mux_reg.offset); in pmx_devs_enable()
147 pmx->mux_reg.offset = driver->mux_reg.offset; in pmx_register()
148 pmx->mux_reg.mask = driver->mux_reg.mask; in pmx_register()
/linux-3.4.99/arch/arm/plat-omap/include/plat/
Dmux.h41 .mux_reg = FUNC_MUX_CTRL_##reg, \
55 .mux_reg = OMAP7XX_IO_CONF_##reg, \
66 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
78 .mux_reg = OMAP7XX_IO_CONF_##reg, \
88 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ argument
94 MUX_REG(mux_reg, mode_offset, mode) \
107 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ argument
112 MUX_REG_7XX(mux_reg, mode_offset, mode) \
113 PULL_REG_7XX(mux_reg, pull_bit, pull_status) \
119 const unsigned int mux_reg; member
/linux-3.4.99/arch/arm/mach-davinci/
Dmux.h23 .mux_reg = PINMUX(muxreg), \
34 .mux_reg = INTMUX, \
45 .mux_reg = EVTMUX, \
Dmux.c67 reg_orig = __raw_readl(pinmux_base + cfg->mux_reg); in davinci_cfg_reg()
79 __raw_writel(reg, pinmux_base + cfg->mux_reg); in davinci_cfg_reg()
93 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); in davinci_cfg_reg()
/linux-3.4.99/drivers/pinctrl/
Dpinctrl-tegra.c158 if (g->mux_reg < 0) in tegra_pinctrl_enable()
168 val = pmx_readl(pmx, g->mux_bank, g->mux_reg); in tegra_pinctrl_enable()
171 pmx_writel(pmx, val, g->mux_bank, g->mux_reg); in tegra_pinctrl_enable()
187 if (g->mux_reg < 0) in tegra_pinctrl_disable()
190 val = pmx_readl(pmx, g->mux_bank, g->mux_reg); in tegra_pinctrl_disable()
193 pmx_writel(pmx, val, g->mux_bank, g->mux_reg); in tegra_pinctrl_disable()
Dpinctrl-tegra.h83 s16 mux_reg; member
Dpinctrl-tegra20.c2612 .mux_reg = ((mux_r) - PIN_MUX_CTL_REG_A), \
2634 .mux_reg = -1, \
2654 .mux_reg = -1, \
Dpinctrl-tegra30.c3364 .mux_reg = PINGROUP_REG_Y(r), \
3395 .mux_reg = -1, \
/linux-3.4.99/arch/arm/mach-omap1/
Dmux.c355 if (cfg->mux_reg) { in omap1_cfg_reg()
359 reg_orig = omap_readl(cfg->mux_reg); in omap1_cfg_reg()
372 omap_writel(reg, cfg->mux_reg); in omap1_cfg_reg()
431 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); in omap1_cfg_reg()
/linux-3.4.99/arch/arm/plat-spear/include/plat/
Dpadmux.h86 struct pmx_reg mux_reg; member
/linux-3.4.99/arch/arm/mach-tegra/
Dpinmux.c244 if (pingroups[pg].mux_reg < 0) in tegra_pinmux_set_func()
269 reg = pg_readl(pingroups[pg].mux_bank, pingroups[pg].mux_reg); in tegra_pinmux_set_func()
272 pg_writel(reg, pingroups[pg].mux_bank, pingroups[pg].mux_reg); in tegra_pinmux_set_func()
340 if (pingroups[pingroup].mux_reg >= 0) { in tegra_pinmux_config_pingroup()
853 if (pingroups[i].mux_reg < 0) { in dbg_pinmux_show()
858 pingroups[i].mux_reg); in dbg_pinmux_show()
Dpinmux-tegra20-tables.c104 .mux_reg = ((mux_r) - PIN_MUX_CTL_REG_A), \
Dpinmux-tegra30-tables.c103 .mux_reg = ((reg) - MUXCTL_REG_A), \
/linux-3.4.99/arch/arm/mach-tegra/include/mach/
Dpinmux.h266 s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ member
/linux-3.4.99/arch/arm/mach-spear3xx/
Dspear310.c139 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
Dspear300.c370 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
Dspear320.c384 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
/linux-3.4.99/arch/arm/mach-davinci/include/mach/
Dmux.h25 const unsigned char mux_reg; member