1 /* 2 * lis3lv02d.h - ST LIS3LV02DL accelerometer driver 3 * 4 * Copyright (C) 2007-2008 Yan Burman 5 * Copyright (C) 2008-2009 Eric Piel 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 #include <linux/platform_device.h> 22 #include <linux/input-polldev.h> 23 #include <linux/regulator/consumer.h> 24 #include <linux/miscdevice.h> 25 26 /* 27 * This driver tries to support the "digital" accelerometer chips from 28 * STMicroelectronics such as LIS3LV02DL, LIS302DL, LIS3L02DQ, LIS331DL, 29 * LIS35DE, or LIS202DL. They are very similar in terms of programming, with 30 * almost the same registers. In addition to differing on physical properties, 31 * they differ on the number of axes (2/3), precision (8/12 bits), and special 32 * features (freefall detection, click...). Unfortunately, not all the 33 * differences can be probed via a register. 34 * They can be connected either via I²C or SPI. 35 */ 36 37 #include <linux/lis3lv02d.h> 38 39 enum lis3_reg { 40 WHO_AM_I = 0x0F, 41 OFFSET_X = 0x16, 42 OFFSET_Y = 0x17, 43 OFFSET_Z = 0x18, 44 GAIN_X = 0x19, 45 GAIN_Y = 0x1A, 46 GAIN_Z = 0x1B, 47 CTRL_REG1 = 0x20, 48 CTRL_REG2 = 0x21, 49 CTRL_REG3 = 0x22, 50 CTRL_REG4 = 0x23, 51 HP_FILTER_RESET = 0x23, 52 STATUS_REG = 0x27, 53 OUTX_L = 0x28, 54 OUTX_H = 0x29, 55 OUTX = 0x29, 56 OUTY_L = 0x2A, 57 OUTY_H = 0x2B, 58 OUTY = 0x2B, 59 OUTZ_L = 0x2C, 60 OUTZ_H = 0x2D, 61 OUTZ = 0x2D, 62 }; 63 64 enum lis302d_reg { 65 FF_WU_CFG_1 = 0x30, 66 FF_WU_SRC_1 = 0x31, 67 FF_WU_THS_1 = 0x32, 68 FF_WU_DURATION_1 = 0x33, 69 FF_WU_CFG_2 = 0x34, 70 FF_WU_SRC_2 = 0x35, 71 FF_WU_THS_2 = 0x36, 72 FF_WU_DURATION_2 = 0x37, 73 CLICK_CFG = 0x38, 74 CLICK_SRC = 0x39, 75 CLICK_THSY_X = 0x3B, 76 CLICK_THSZ = 0x3C, 77 CLICK_TIMELIMIT = 0x3D, 78 CLICK_LATENCY = 0x3E, 79 CLICK_WINDOW = 0x3F, 80 }; 81 82 enum lis3lv02d_reg { 83 FF_WU_CFG = 0x30, 84 FF_WU_SRC = 0x31, 85 FF_WU_ACK = 0x32, 86 FF_WU_THS_L = 0x34, 87 FF_WU_THS_H = 0x35, 88 FF_WU_DURATION = 0x36, 89 DD_CFG = 0x38, 90 DD_SRC = 0x39, 91 DD_ACK = 0x3A, 92 DD_THSI_L = 0x3C, 93 DD_THSI_H = 0x3D, 94 DD_THSE_L = 0x3E, 95 DD_THSE_H = 0x3F, 96 }; 97 98 enum lis3_who_am_i { 99 WAI_3DC = 0x33, /* 8 bits: LIS3DC, HP3DC */ 100 WAI_12B = 0x3A, /* 12 bits: LIS3LV02D[LQ]... */ 101 WAI_8B = 0x3B, /* 8 bits: LIS[23]02D[LQ]... */ 102 WAI_6B = 0x52, /* 6 bits: LIS331DLF - not supported */ 103 }; 104 105 enum lis3lv02d_ctrl1_12b { 106 CTRL1_Xen = 0x01, 107 CTRL1_Yen = 0x02, 108 CTRL1_Zen = 0x04, 109 CTRL1_ST = 0x08, 110 CTRL1_DF0 = 0x10, 111 CTRL1_DF1 = 0x20, 112 CTRL1_PD0 = 0x40, 113 CTRL1_PD1 = 0x80, 114 }; 115 116 /* Delta to ctrl1_12b version */ 117 enum lis3lv02d_ctrl1_8b { 118 CTRL1_STM = 0x08, 119 CTRL1_STP = 0x10, 120 CTRL1_FS = 0x20, 121 CTRL1_PD = 0x40, 122 CTRL1_DR = 0x80, 123 }; 124 125 enum lis3lv02d_ctrl1_3dc { 126 CTRL1_ODR0 = 0x10, 127 CTRL1_ODR1 = 0x20, 128 CTRL1_ODR2 = 0x40, 129 CTRL1_ODR3 = 0x80, 130 }; 131 132 enum lis3lv02d_ctrl2 { 133 CTRL2_DAS = 0x01, 134 CTRL2_SIM = 0x02, 135 CTRL2_DRDY = 0x04, 136 CTRL2_IEN = 0x08, 137 CTRL2_BOOT = 0x10, 138 CTRL2_BLE = 0x20, 139 CTRL2_BDU = 0x40, /* Block Data Update */ 140 CTRL2_FS = 0x80, /* Full Scale selection */ 141 }; 142 143 enum lis3lv02d_ctrl4_3dc { 144 CTRL4_SIM = 0x01, 145 CTRL4_ST0 = 0x02, 146 CTRL4_ST1 = 0x04, 147 CTRL4_FS0 = 0x10, 148 CTRL4_FS1 = 0x20, 149 }; 150 151 enum lis302d_ctrl2 { 152 HP_FF_WU2 = 0x08, 153 HP_FF_WU1 = 0x04, 154 CTRL2_BOOT_8B = 0x40, 155 }; 156 157 enum lis3lv02d_ctrl3 { 158 CTRL3_CFS0 = 0x01, 159 CTRL3_CFS1 = 0x02, 160 CTRL3_FDS = 0x10, 161 CTRL3_HPFF = 0x20, 162 CTRL3_HPDD = 0x40, 163 CTRL3_ECK = 0x80, 164 }; 165 166 enum lis3lv02d_status_reg { 167 STATUS_XDA = 0x01, 168 STATUS_YDA = 0x02, 169 STATUS_ZDA = 0x04, 170 STATUS_XYZDA = 0x08, 171 STATUS_XOR = 0x10, 172 STATUS_YOR = 0x20, 173 STATUS_ZOR = 0x40, 174 STATUS_XYZOR = 0x80, 175 }; 176 177 enum lis3lv02d_ff_wu_cfg { 178 FF_WU_CFG_XLIE = 0x01, 179 FF_WU_CFG_XHIE = 0x02, 180 FF_WU_CFG_YLIE = 0x04, 181 FF_WU_CFG_YHIE = 0x08, 182 FF_WU_CFG_ZLIE = 0x10, 183 FF_WU_CFG_ZHIE = 0x20, 184 FF_WU_CFG_LIR = 0x40, 185 FF_WU_CFG_AOI = 0x80, 186 }; 187 188 enum lis3lv02d_ff_wu_src { 189 FF_WU_SRC_XL = 0x01, 190 FF_WU_SRC_XH = 0x02, 191 FF_WU_SRC_YL = 0x04, 192 FF_WU_SRC_YH = 0x08, 193 FF_WU_SRC_ZL = 0x10, 194 FF_WU_SRC_ZH = 0x20, 195 FF_WU_SRC_IA = 0x40, 196 }; 197 198 enum lis3lv02d_dd_cfg { 199 DD_CFG_XLIE = 0x01, 200 DD_CFG_XHIE = 0x02, 201 DD_CFG_YLIE = 0x04, 202 DD_CFG_YHIE = 0x08, 203 DD_CFG_ZLIE = 0x10, 204 DD_CFG_ZHIE = 0x20, 205 DD_CFG_LIR = 0x40, 206 DD_CFG_IEND = 0x80, 207 }; 208 209 enum lis3lv02d_dd_src { 210 DD_SRC_XL = 0x01, 211 DD_SRC_XH = 0x02, 212 DD_SRC_YL = 0x04, 213 DD_SRC_YH = 0x08, 214 DD_SRC_ZL = 0x10, 215 DD_SRC_ZH = 0x20, 216 DD_SRC_IA = 0x40, 217 }; 218 219 enum lis3lv02d_click_src_8b { 220 CLICK_SINGLE_X = 0x01, 221 CLICK_DOUBLE_X = 0x02, 222 CLICK_SINGLE_Y = 0x04, 223 CLICK_DOUBLE_Y = 0x08, 224 CLICK_SINGLE_Z = 0x10, 225 CLICK_DOUBLE_Z = 0x20, 226 CLICK_IA = 0x40, 227 }; 228 229 enum lis3lv02d_reg_state { 230 LIS3_REG_OFF = 0x00, 231 LIS3_REG_ON = 0x01, 232 }; 233 234 union axis_conversion { 235 struct { 236 int x, y, z; 237 }; 238 int as_array[3]; 239 240 }; 241 242 struct lis3lv02d { 243 void *bus_priv; /* used by the bus layer only */ 244 struct device *pm_dev; /* for pm_runtime purposes */ 245 int (*init) (struct lis3lv02d *lis3); 246 int (*write) (struct lis3lv02d *lis3, int reg, u8 val); 247 int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret); 248 int (*blkread) (struct lis3lv02d *lis3, int reg, int len, u8 *ret); 249 int (*reg_ctrl) (struct lis3lv02d *lis3, bool state); 250 251 int *odrs; /* Supported output data rates */ 252 u8 *regs; /* Regs to store / restore */ 253 int regs_size; 254 u8 *reg_cache; 255 bool regs_stored; 256 u8 odr_mask; /* ODR bit mask */ 257 u8 whoami; /* indicates measurement precision */ 258 s16 (*read_data) (struct lis3lv02d *lis3, int reg); 259 int mdps_max_val; 260 int pwron_delay; 261 int scale; /* 262 * relationship between 1 LBS and mG 263 * (1/1000th of earth gravity) 264 */ 265 266 struct input_polled_dev *idev; /* input device */ 267 struct platform_device *pdev; /* platform device */ 268 struct regulator_bulk_data regulators[2]; 269 atomic_t count; /* interrupt count after last read */ 270 union axis_conversion ac; /* hw -> logical axis */ 271 int mapped_btns[3]; 272 273 u32 irq; /* IRQ number */ 274 struct fasync_struct *async_queue; /* queue for the misc device */ 275 wait_queue_head_t misc_wait; /* Wait queue for the misc device */ 276 unsigned long misc_opened; /* bit0: whether the device is open */ 277 struct miscdevice miscdev; 278 279 int data_ready_count[2]; 280 atomic_t wake_thread; 281 unsigned char irq_cfg; 282 283 struct lis3lv02d_platform_data *pdata; /* for passing board config */ 284 struct mutex mutex; /* Serialize poll and selftest */ 285 }; 286 287 int lis3lv02d_init_device(struct lis3lv02d *lis3); 288 int lis3lv02d_joystick_enable(struct lis3lv02d *lis3); 289 void lis3lv02d_joystick_disable(struct lis3lv02d *lis3); 290 void lis3lv02d_poweroff(struct lis3lv02d *lis3); 291 int lis3lv02d_poweron(struct lis3lv02d *lis3); 292 int lis3lv02d_remove_fs(struct lis3lv02d *lis3); 293 294 extern struct lis3lv02d lis3_dev; 295