1 /*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55 #ifndef _ISCI_PHY_H_
56 #define _ISCI_PHY_H_
57
58 #include <scsi/sas.h>
59 #include <scsi/libsas.h>
60 #include "isci.h"
61 #include "sas.h"
62
63 /* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
64 * before restarting the starting state machine. Technically, the old parallel
65 * ATA specification required up to 30 seconds for a device to issue its
66 * signature FIS as a result of a soft reset. Now we see that devices respond
67 * generally within 15 seconds, but we'll use 25 for now.
68 */
69 #define SCIC_SDS_SIGNATURE_FIS_TIMEOUT 25000
70
71 /* This is the timeout for the SATA OOB/SN because the hardware does not
72 * recognize a hot plug after OOB signal but before the SN signals. We need to
73 * make sure after a hotplug timeout if we have not received the speed event
74 * notification from the hardware that we restart the hardware OOB state
75 * machine.
76 */
77 #define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT 250
78
79 enum sci_phy_protocol {
80 SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
81 SCIC_SDS_PHY_PROTOCOL_SAS,
82 SCIC_SDS_PHY_PROTOCOL_SATA,
83 SCIC_SDS_MAX_PHY_PROTOCOLS
84 };
85
86 /**
87 * isci_phy - hba local phy infrastructure
88 * @sm:
89 * @protocol: attached device protocol
90 * @phy_index: physical index relative to the controller (0-3)
91 * @bcn_received_while_port_unassigned: bcn to report after port association
92 * @sata_timer: timeout SATA signature FIS arrival
93 */
94 struct isci_phy {
95 struct sci_base_state_machine sm;
96 struct isci_port *owning_port;
97 enum sas_linkrate max_negotiated_speed;
98 enum sci_phy_protocol protocol;
99 u8 phy_index;
100 bool bcn_received_while_port_unassigned;
101 bool is_in_link_training;
102 struct sci_timer sata_timer;
103 struct scu_transport_layer_registers __iomem *transport_layer_registers;
104 struct scu_link_layer_registers __iomem *link_layer_registers;
105 struct asd_sas_phy sas_phy;
106 u8 sas_addr[SAS_ADDR_SIZE];
107 union {
108 struct sas_identify_frame iaf;
109 struct dev_to_host_fis fis;
110 } frame_rcvd;
111 };
112
to_iphy(struct asd_sas_phy * sas_phy)113 static inline struct isci_phy *to_iphy(struct asd_sas_phy *sas_phy)
114 {
115 struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);
116
117 return iphy;
118 }
119
120 struct sci_phy_cap {
121 union {
122 struct {
123 /*
124 * The SAS specification indicates the start bit shall
125 * always be set to
126 * 1. This implementation will have the start bit set
127 * to 0 if the PHY CAPABILITIES were either not
128 * received or speed negotiation failed.
129 */
130 u8 start:1;
131 u8 tx_ssc_type:1;
132 u8 res1:2;
133 u8 req_logical_linkrate:4;
134
135 u32 gen1_no_ssc:1;
136 u32 gen1_ssc:1;
137 u32 gen2_no_ssc:1;
138 u32 gen2_ssc:1;
139 u32 gen3_no_ssc:1;
140 u32 gen3_ssc:1;
141 u32 res2:17;
142 u32 parity:1;
143 };
144 u32 all;
145 };
146 } __packed;
147
148 /* this data structure reflects the link layer transmit identification reg */
149 struct sci_phy_proto {
150 union {
151 struct {
152 u16 _r_a:1;
153 u16 smp_iport:1;
154 u16 stp_iport:1;
155 u16 ssp_iport:1;
156 u16 _r_b:4;
157 u16 _r_c:1;
158 u16 smp_tport:1;
159 u16 stp_tport:1;
160 u16 ssp_tport:1;
161 u16 _r_d:4;
162 };
163 u16 all;
164 };
165 } __packed;
166
167
168 /**
169 * struct sci_phy_properties - This structure defines the properties common to
170 * all phys that can be retrieved.
171 *
172 *
173 */
174 struct sci_phy_properties {
175 /**
176 * This field specifies the port that currently contains the
177 * supplied phy. This field may be set to NULL
178 * if the phy is not currently contained in a port.
179 */
180 struct isci_port *iport;
181
182 /**
183 * This field specifies the link rate at which the phy is
184 * currently operating.
185 */
186 enum sas_linkrate negotiated_link_rate;
187
188 /**
189 * This field specifies the index of the phy in relation to other
190 * phys within the controller. This index is zero relative.
191 */
192 u8 index;
193 };
194
195 /**
196 * struct sci_sas_phy_properties - This structure defines the properties,
197 * specific to a SAS phy, that can be retrieved.
198 *
199 *
200 */
201 struct sci_sas_phy_properties {
202 /**
203 * This field delineates the Identify Address Frame received
204 * from the remote end point.
205 */
206 struct sas_identify_frame rcvd_iaf;
207
208 /**
209 * This field delineates the Phy capabilities structure received
210 * from the remote end point.
211 */
212 struct sci_phy_cap rcvd_cap;
213
214 };
215
216 /**
217 * struct sci_sata_phy_properties - This structure defines the properties,
218 * specific to a SATA phy, that can be retrieved.
219 *
220 *
221 */
222 struct sci_sata_phy_properties {
223 /**
224 * This field delineates the signature FIS received from the
225 * attached target.
226 */
227 struct dev_to_host_fis signature_fis;
228
229 /**
230 * This field specifies to the user if a port selector is connected
231 * on the specified phy.
232 */
233 bool is_port_selector_present;
234
235 };
236
237 /**
238 * enum sci_phy_counter_id - This enumeration depicts the various pieces of
239 * optional information that can be retrieved for a specific phy.
240 *
241 *
242 */
243 enum sci_phy_counter_id {
244 /**
245 * This PHY information field tracks the number of frames received.
246 */
247 SCIC_PHY_COUNTER_RECEIVED_FRAME,
248
249 /**
250 * This PHY information field tracks the number of frames transmitted.
251 */
252 SCIC_PHY_COUNTER_TRANSMITTED_FRAME,
253
254 /**
255 * This PHY information field tracks the number of DWORDs received.
256 */
257 SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,
258
259 /**
260 * This PHY information field tracks the number of DWORDs transmitted.
261 */
262 SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,
263
264 /**
265 * This PHY information field tracks the number of times DWORD
266 * synchronization was lost.
267 */
268 SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,
269
270 /**
271 * This PHY information field tracks the number of received DWORDs with
272 * running disparity errors.
273 */
274 SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,
275
276 /**
277 * This PHY information field tracks the number of received frames with a
278 * CRC error (not including short or truncated frames).
279 */
280 SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,
281
282 /**
283 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
284 * primitives received.
285 */
286 SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,
287
288 /**
289 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
290 * primitives transmitted.
291 */
292 SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,
293
294 /**
295 * This PHY information field tracks the number of times the inactivity
296 * timer for connections on the phy has been utilized.
297 */
298 SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,
299
300 /**
301 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
302 * primitives received.
303 */
304 SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,
305
306 /**
307 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
308 * primitives transmitted.
309 */
310 SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,
311
312 /**
313 * This PHY information field tracks the number of CREDIT BLOCKED
314 * primitives received.
315 * @note Depending on remote device implementation, credit blocks
316 * may occur regularly.
317 */
318 SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,
319
320 /**
321 * This PHY information field contains the number of short frames
322 * received. A short frame is simply a frame smaller then what is
323 * allowed by either the SAS or SATA specification.
324 */
325 SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,
326
327 /**
328 * This PHY information field contains the number of frames received after
329 * credit has been exhausted.
330 */
331 SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,
332
333 /**
334 * This PHY information field contains the number of frames received after
335 * a DONE has been received.
336 */
337 SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,
338
339 /**
340 * This PHY information field contains the number of times the phy
341 * failed to achieve DWORD synchronization during speed negotiation.
342 */
343 SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR
344 };
345
346 /**
347 * enum sci_phy_states - phy state machine states
348 * @SCI_PHY_INITIAL: Simply the initial state for the base domain state
349 * machine.
350 * @SCI_PHY_STOPPED: phy has successfully been stopped. In this state
351 * no new IO operations are permitted on this phy.
352 * @SCI_PHY_STARTING: the phy is in the process of becomming ready. In
353 * this state no new IO operations are permitted on
354 * this phy.
355 * @SCI_PHY_SUB_INITIAL: Initial state
356 * @SCI_PHY_SUB_AWAIT_OSSP_EN: Wait state for the hardware OSSP event
357 * type notification
358 * @SCI_PHY_SUB_AWAIT_SAS_SPEED_EN: Wait state for the PHY speed
359 * notification
360 * @SCI_PHY_SUB_AWAIT_IAF_UF: Wait state for the IAF Unsolicited frame
361 * notification
362 * @SCI_PHY_SUB_AWAIT_SAS_POWER: Wait state for the request to consume
363 * power
364 * @SCI_PHY_SUB_AWAIT_SATA_POWER: Wait state for request to consume
365 * power
366 * @SCI_PHY_SUB_AWAIT_SATA_PHY_EN: Wait state for the SATA PHY
367 * notification
368 * @SCI_PHY_SUB_AWAIT_SATA_SPEED_EN: Wait for the SATA PHY speed
369 * notification
370 * @SCI_PHY_SUB_AWAIT_SIG_FIS_UF: Wait state for the SIGNATURE FIS
371 * unsolicited frame notification
372 * @SCI_PHY_SUB_FINAL: Exit state for this state machine
373 * @SCI_PHY_READY: phy is now ready. Thus, the user is able to perform
374 * IO operations utilizing this phy as long as it is
375 * currently part of a valid port. This state is
376 * entered from the STARTING state.
377 * @SCI_PHY_RESETTING: phy is in the process of being reset. In this
378 * state no new IO operations are permitted on this
379 * phy. This state is entered from the READY state.
380 * @SCI_PHY_FINAL: Simply the final state for the base phy state
381 * machine.
382 */
383 #define PHY_STATES {\
384 C(PHY_INITIAL),\
385 C(PHY_STOPPED),\
386 C(PHY_STARTING),\
387 C(PHY_SUB_INITIAL),\
388 C(PHY_SUB_AWAIT_OSSP_EN),\
389 C(PHY_SUB_AWAIT_SAS_SPEED_EN),\
390 C(PHY_SUB_AWAIT_IAF_UF),\
391 C(PHY_SUB_AWAIT_SAS_POWER),\
392 C(PHY_SUB_AWAIT_SATA_POWER),\
393 C(PHY_SUB_AWAIT_SATA_PHY_EN),\
394 C(PHY_SUB_AWAIT_SATA_SPEED_EN),\
395 C(PHY_SUB_AWAIT_SIG_FIS_UF),\
396 C(PHY_SUB_FINAL),\
397 C(PHY_READY),\
398 C(PHY_RESETTING),\
399 C(PHY_FINAL),\
400 }
401 #undef C
402 #define C(a) SCI_##a
403 enum sci_phy_states PHY_STATES;
404 #undef C
405
406 void sci_phy_construct(
407 struct isci_phy *iphy,
408 struct isci_port *iport,
409 u8 phy_index);
410
411 struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy);
412
413 void sci_phy_set_port(
414 struct isci_phy *iphy,
415 struct isci_port *iport);
416
417 enum sci_status sci_phy_initialize(
418 struct isci_phy *iphy,
419 struct scu_transport_layer_registers __iomem *transport_layer_registers,
420 struct scu_link_layer_registers __iomem *link_layer_registers);
421
422 enum sci_status sci_phy_start(
423 struct isci_phy *iphy);
424
425 enum sci_status sci_phy_stop(
426 struct isci_phy *iphy);
427
428 enum sci_status sci_phy_reset(
429 struct isci_phy *iphy);
430
431 void sci_phy_resume(
432 struct isci_phy *iphy);
433
434 void sci_phy_setup_transport(
435 struct isci_phy *iphy,
436 u32 device_id);
437
438 enum sci_status sci_phy_event_handler(
439 struct isci_phy *iphy,
440 u32 event_code);
441
442 enum sci_status sci_phy_frame_handler(
443 struct isci_phy *iphy,
444 u32 frame_index);
445
446 enum sci_status sci_phy_consume_power_handler(
447 struct isci_phy *iphy);
448
449 void sci_phy_get_sas_address(
450 struct isci_phy *iphy,
451 struct sci_sas_address *sas_address);
452
453 void sci_phy_get_attached_sas_address(
454 struct isci_phy *iphy,
455 struct sci_sas_address *sas_address);
456
457 struct sci_phy_proto;
458 void sci_phy_get_protocols(
459 struct isci_phy *iphy,
460 struct sci_phy_proto *protocols);
461 enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy);
462
463 struct isci_host;
464 void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);
465 int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);
466
467 #endif /* !defined(_ISCI_PHY_H_) */
468