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Searched refs:fcr31 (Results 1 – 19 of 19) sorted by relevance

/linux-3.4.99/arch/mips/math-emu/
Dkernel_linkage.c42 current->thread.fpu.fcr31 = 0; in fpu_emulator_init_fpu()
64 err |= __put_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr); in fpu_emulator_save_context()
78 err |= __get_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr); in fpu_emulator_restore_context()
97 err |= __put_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr); in fpu_emulator_save_context32()
111 err |= __get_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr); in fpu_emulator_restore_context32()
Dcp1emu.c395 value = ctx->fcr31; in cop1Emulate()
435 ctx->fcr31 = (value & in cop1Emulate()
439 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { in cop1Emulate()
452 cond = ctx->fcr31 & fpucondbit[MIPSInst_RT(ir) >> 2]; in cop1Emulate()
454 cond = ctx->fcr31 & FPU_CSR_COND; in cop1Emulate()
565 if (((ctx->fcr31 & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0)) in cop1Emulate()
732 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr; in fpux_emu()
733 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { in fpux_emu()
892 if (((ctx->fcr31 & cond) != 0) != in fpu_emu()
1077 if (((ctx->fcr31 & cond) != 0) != in fpu_emu()
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Dieee754.h331 #define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31))
/linux-3.4.99/arch/mips/kernel/
Dbranch.c34 unsigned int bit, fcr31, dspcontrol; in __compute_return_epc_for_insn() local
191 asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); in __compute_return_epc_for_insn()
193 fcr31 = current->thread.fpu.fcr31; in __compute_return_epc_for_insn()
202 if (~fcr31 & (1 << bit)) { in __compute_return_epc_for_insn()
213 if (fcr31 & (1 << bit)) { in __compute_return_epc_for_insn()
Dptrace32.c125 tmp = child->thread.fpu.fcr31; in compat_arch_ptrace()
237 child->thread.fpu.fcr31 = 0; in compat_arch_ptrace()
265 child->thread.fpu.fcr31 = data; in compat_arch_ptrace()
Dr6000_fpu.S28 cfc1 t1,fcr31
84 ctc1 t0,fcr31
Dptrace.c122 __put_user(child->thread.fpu.fcr31, data + 64); in ptrace_getfpregs()
163 __get_user(child->thread.fpu.fcr31, data + 64); in ptrace_setfpregs()
327 tmp = child->thread.fpu.fcr31; in arch_ptrace()
418 child->thread.fpu.fcr31 = 0; in arch_ptrace()
454 child->thread.fpu.fcr31 = data; in arch_ptrace()
Dr4k_fpu.S36 cfc1 t1, fcr31
83 cfc1 t1, fcr31
151 ctc1 t0, fcr31
176 ctc1 t0, fcr31
Dtraps.c697 asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) in do_fpe() argument
706 if (fcr31 & FPU_CSR_UNI_X) { in do_fpe()
731 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X; in do_fpe()
740 } else if (fcr31 & FPU_CSR_INV_X) in do_fpe()
742 else if (fcr31 & FPU_CSR_DIV_X) in do_fpe()
744 else if (fcr31 & FPU_CSR_OVF_X) in do_fpe()
746 else if (fcr31 & FPU_CSR_UDF_X) in do_fpe()
748 else if (fcr31 & FPU_CSR_INE_X) in do_fpe()
Dr2300_fpu.S32 cfc1 t1,fcr31
118 ctc1 t0,fcr31
Dkgdb.c145 memcpy((void *)&current->thread.fpu.fcr31, mem, in dbg_set_reg()
180 memcpy(mem, (void *)&current->thread.fpu.fcr31, in dbg_get_reg()
Dr2300_switch.S133 ctc1 t1, fcr31
Dgenex.S391 cfc1 a1, fcr31
394 ctc1 a2, fcr31
Dr4k_switch.S172 ctc1 t1, fcr31
Dasm-offsets.c171 OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31); in output_thread_fpu_defines()
/linux-3.4.99/arch/mips/include/asm/
Dfpregdef.h56 #define fcr31 $31 /* FPU status register */ macro
95 #define fcr31 $31 macro
Dasmmacro-32.h16 cfc1 \tmp1, fcr31
37 cfc1 \tmp, fcr31
91 ctc1 \tmp, fcr31
128 ctc1 \tmp, fcr31
Dprocessor.h107 unsigned int fcr31; member
277 .fcr31 = 0, \
Dasmmacro-64.h17 cfc1 \tmp, fcr31
82 ctc1 \tmp, fcr31