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Searched refs:duty (Results 1 – 25 of 31) sorted by relevance

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/linux-3.4.99/arch/blackfin/kernel/
Dpwm.c64 unsigned long period, duty; in pwm_config() local
76 duty = period - val; in pwm_config()
78 if (duty >= period) in pwm_config()
79 duty = period - 1; in pwm_config()
82 set_gptimer_pwidth(pwm->id, duty); in pwm_config()
/linux-3.4.99/arch/mips/jz4740/
Dpwm.c97 unsigned long period, duty; in pwm_config() local
120 duty = period - tmp; in pwm_config()
122 if (duty >= period) in pwm_config()
123 duty = period - 1; in pwm_config()
130 jz4740_timer_set_duty(id, duty); in pwm_config()
Dtimer.h95 static inline void jz4740_timer_set_duty(unsigned int timer, uint16_t duty) in jz4740_timer_set_duty() argument
97 writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer)); in jz4740_timer_set_duty()
/linux-3.4.99/Documentation/hwmon/
Dvt1211167 Each PWM has 4 associated distinct output duty-cycles: full, high, low and
172 thermal thresholds exist that controls both PWMs output duty-cycles. The
181 pwm[1-2]_auto_point4_pwm full speed duty-cycle (hard-wired to 255)
182 pwm[1-2]_auto_point3_pwm high speed duty-cycle
183 pwm[1-2]_auto_point2_pwm low speed duty-cycle
184 pwm[1-2]_auto_point1_pwm off duty-cycle (hard-wired to 0)
194 PWM output duty-cycle based on the input temperature:
199 full speed duty-cycle full speed duty-cycle
201 high speed duty-cycle full speed duty-cycle
203 low speed duty-cycle high speed duty-cycle
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Ddme1737143 attribute that needs to be set to the maximum attainable RPM (fan at 100% duty-
155 manual mode, the fan speed is set by writing the duty-cycle value to the
157 current duty-cycle as set by the fan controller in the chip. All PWM outputs
168 duty-cycles: full, low, and min. Full is internally hard-wired to 255 (100%)
174 pwm[1-3]_auto_point2_pwm full-speed duty-cycle (255, i.e., 100%)
175 pwm[1-3]_auto_point1_pwm low-speed duty-cycle
176 pwm[1-3]_auto_pwm_min min-speed duty-cycle
183 The chip adjusts the output duty-cycle linearly in the range of auto_point1_pwm
186 auto_point1_temp_hyst value, the output duty-cycle is set to the auto_pwm_min
189 duty-cycle. If any of the temperatures rise above the auto_point3_temp value,
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Dlm9398 a minimum pulse width of 5 clocks (at 22.5kHz => 6.25% duty cycle), and
99 a maximum pulse width of 80 clocks (at 22.5kHz => 99.88% duty cycle).
104 contains a value controlling the duty cycle for the PWM signal used when
106 indicating minimum duty cycle and 15 indicating maximum.
137 and pwm2 are used to set the manual duty cycle; each is an integer (0-255)
138 where 0 is 0% duty cycle, and 255 is 100%. Note that the duty cycle values
141 PWM mode is disabled, the value of pwm1 and pwm2 indicates the current duty
218 A spin-up cycle occurs when a PWM output is commanded from 0% duty cycle to
219 some value > 0%. The LM93 supports a minimum duty cycle during spin-up. These
221 file has the same representation as other PWM duty cycle values. The
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Dmax663938 pwm1 RW Fan 1 target duty cycle (0..255)
39 pwm2 RW Fan 2 target duty cycle (0..255)
Df71882fg99 There are 2 modes to specify the speed of the fan, PWM duty cycle (or DC
100 voltage) mode, where 0-100% duty cycle (0-100% of 12V) is specified. And RPM
122 You ask for a specific PWM duty cycle / DC voltage or a specific % of
133 * 3: Thermostat mode (Only available on the F8000 when in duty cycle mode)
Dw83792d134 specific speed set by pwm# and automatically controlled its PWM duty cycle
137 (1) If the temperature still exceeds the high limit, PWM duty
144 (3) If the temperature goes below the low limit, PWM duty cycle will decrease
161 pwm[1-3] - this file stores PWM duty cycle or DC value (fan speed) in range:
Dw83l786ng44 pwm[1-2] - this file stores PWM duty cycle or DC value (fan speed) in range:
/linux-3.4.99/drivers/gpu/drm/nouveau/
Dnv40_pm.c354 nv40_pm_pwm_get(struct drm_device *dev, int line, u32 *divs, u32 *duty) in nv40_pm_pwm_get() argument
359 *duty = (reg & 0x7fff0000) >> 16; in nv40_pm_pwm_get()
368 *duty = (reg & 0x7fffffff); in nv40_pm_pwm_get()
380 nv40_pm_pwm_set(struct drm_device *dev, int line, u32 divs, u32 duty) in nv40_pm_pwm_set() argument
383 nv_wr32(dev, 0x0010f0, 0x80000000 | (duty << 16) | divs); in nv40_pm_pwm_set()
387 nv_wr32(dev, 0x0015f4, duty | 0x80000000); in nv40_pm_pwm_set()
Dnouveau_pm.c44 u32 divs, duty; in nouveau_pwmfan_get() local
52 ret = pm->pwm_get(dev, gpio.line, &divs, &duty); in nouveau_pwmfan_get()
54 divs = max(divs, duty); in nouveau_pwmfan_get()
56 duty = divs - duty; in nouveau_pwmfan_get()
57 return (duty * 100) / divs; in nouveau_pwmfan_get()
72 u32 divs, duty; in nouveau_pwmfan_set() local
88 duty = ((divs * percent) + 99) / 100; in nouveau_pwmfan_set()
90 duty = divs - duty; in nouveau_pwmfan_set()
92 ret = pm->pwm_set(dev, gpio.line, divs, duty); in nouveau_pwmfan_set()
Dnv50_pm.c860 nv50_pm_pwm_get(struct drm_device *dev, int line, u32 *divs, u32 *duty) in nv50_pm_pwm_get() argument
868 *duty = nv_rd32(dev, 0x00e118 + (id * 8)); in nv50_pm_pwm_get()
876 nv50_pm_pwm_set(struct drm_device *dev, int line, u32 divs, u32 duty) in nv50_pm_pwm_set() argument
884 nv_wr32(dev, 0x00e118 + (id * 8), duty | 0x80000000); in nv50_pm_pwm_set()
/linux-3.4.99/arch/cris/include/asm/
Detraxgpio.h184 int duty; /* 0..255 */ member
218 int duty; /* 0..255 */ member
/linux-3.4.99/drivers/misc/
Dep93xx_pwm.c159 u32 term, duty; in ep93xx_pwm_set_freq() local
168 duty = ((val + 1) * pwm->duty_percent / 100) - 1; in ep93xx_pwm_set_freq()
173 ep93xx_pwm_write_dc(pwm, duty); in ep93xx_pwm_set_freq()
175 ep93xx_pwm_write_dc(pwm, duty); in ep93xx_pwm_set_freq()
/linux-3.4.99/Documentation/backlight/
Dlp855x-driver.txt41 - pwm_set_intensity() : set duty of PWM
42 - pwm_get_intensity() : get current duty of PWM
/linux-3.4.99/arch/cris/arch-v32/drivers/mach-a3/
Dgpio.c858 unsigned int duty; in gpio_pwm_set_duty() local
861 if (get_user(duty, &((struct io_pwm_set_duty *) arg)->duty)) in gpio_pwm_set_duty()
863 if (duty > 255) in gpio_pwm_set_duty()
865 rw_pwm_duty.data = duty; in gpio_pwm_set_duty()
/linux-3.4.99/drivers/input/misc/
Dmax8997_haptic.c76 unsigned int duty = chip->pwm_period * chip->level / 100; in max8997_haptic_set_duty_cycle() local
77 ret = pwm_config(chip->pwm, duty, chip->pwm_period); in max8997_haptic_set_duty_cycle()
/linux-3.4.99/drivers/hwmon/
Df75375s.c780 bool manu, duty; in f75375_init() local
786 duty = ((mode >> F75387_FAN_DUTY_MODE(nr)) & 1); in f75375_init()
787 if (!manu && duty) in f75375_init()
790 else if (manu && !duty) in f75375_init()
793 else if (!manu && !duty) in f75375_init()
/linux-3.4.99/Documentation/arm/Samsung-S3C24XX/
DDMA.txt9 duty of managing channel mappings, and programming the
/linux-3.4.99/Documentation/leds/
Dleds-lp3944.txt23 - duty cycle: percentage of the period the led is on, from 0 to 100
/linux-3.4.99/arch/arm/include/asm/hardware/
Dlocomo.h215 void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf);
/linux-3.4.99/Documentation/isdn/
DCREDITS65 For heavy-duty-beta-testing with his BBS ;)
/linux-3.4.99/Documentation/cpu-freq/
Dgovernors.txt210 CPUFREQ_GOV_START: This governor shall start its duty for the CPU
212 CPUFREQ_GOV_STOP: This governor shall end its duty for the CPU
/linux-3.4.99/arch/arm/common/
Dlocomo.c796 void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf) in locomo_frontlight_set() argument
809 locomo_writel(duty, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALD); in locomo_frontlight_set()

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