Searched refs:dspbase_reg (Results 1 – 6 of 6) sorted by relevance
/linux-3.4.99/drivers/gpu/drm/gma500/ |
D | mdfld_intel_display.c | 286 int dspbase_reg = MRST_DSPABASE; in mdfld_disable_crtc() local 299 dspbase_reg = DSPBSURF; in mdfld_disable_crtc() 305 dspbase_reg = MDFLD_DSPCBASE; in mdfld_disable_crtc() 323 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in mdfld_disable_crtc() 324 REG_READ(dspbase_reg); in mdfld_disable_crtc() 378 int dspbase_reg = MRST_DSPABASE; in mdfld_crtc_dpms() local 396 dspbase_reg = MRST_DSPBBASE; in mdfld_crtc_dpms() 403 dspbase_reg = MDFLD_DSPCBASE; in mdfld_crtc_dpms() 461 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in mdfld_crtc_dpms() 486 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in mdfld_crtc_dpms() [all …]
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D | oaktrail_crtc.c | 169 int dspbase_reg = (pipe == 0) ? MRST_DSPABASE : DSPBBASE; in oaktrail_crtc_dpms() local 209 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in oaktrail_crtc_dpms() 231 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in oaktrail_crtc_dpms() 232 REG_READ(dspbase_reg); in oaktrail_crtc_dpms()
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D | cdv_intel_display.c | 569 int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE; in cdv_intel_crtc_dpms() local 604 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in cdv_intel_crtc_dpms() 651 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in cdv_intel_crtc_dpms() 652 REG_READ(dspbase_reg); in cdv_intel_crtc_dpms()
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D | psb_intel_display.c | 433 int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE; in psb_intel_crtc_dpms() local 472 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in psb_intel_crtc_dpms() 495 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in psb_intel_crtc_dpms() 496 REG_READ(dspbase_reg); in psb_intel_crtc_dpms()
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D | mdfld_dsi_dpi.c | 143 u32 dspbase_reg = pipe ? MDFLD_DSPCBASE : MRST_DSPABASE; in dsi_set_pipe_plane_enable_state() local 157 REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); in dsi_set_pipe_plane_enable_state() 158 REG_READ(dspbase_reg); in dsi_set_pipe_plane_enable_state()
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/linux-3.4.99/drivers/gpu/drm/i915/ |
D | intel_tv.c | 1083 int dspbase_reg = DSPADDR(intel_crtc->plane); in intel_tv_mode_set() local 1089 I915_WRITE(dspbase_reg, I915_READ(dspbase_reg)); in intel_tv_mode_set() 1119 I915_WRITE(dspbase_reg, I915_READ(dspbase_reg)); in intel_tv_mode_set()
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