Searched refs:div_reg (Results 1 – 9 of 9) sorted by relevance
| /linux-3.4.99/arch/arm/mach-davinci/ |
| D | dm365.c | 93 .div_reg = BPDIV
106 .div_reg = PLLDIV1,
113 .div_reg = PLLDIV2,
120 .div_reg = PLLDIV3,
127 .div_reg = PLLDIV4,
134 .div_reg = PLLDIV5,
141 .div_reg = PLLDIV6,
148 .div_reg = PLLDIV7,
155 .div_reg = PLLDIV8,
162 .div_reg = PLLDIV9,
[all …]
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| D | dm646x.c | 86 .div_reg = PLLDIV1,
93 .div_reg = PLLDIV2,
100 .div_reg = PLLDIV3,
107 .div_reg = PLLDIV4,
114 .div_reg = PLLDIV5,
121 .div_reg = PLLDIV6,
128 .div_reg = PLLDIV8,
135 .div_reg = PLLDIV9,
142 .div_reg = BPDIV,
162 .div_reg = PLLDIV1,
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| D | dm644x.c | 71 .div_reg = PLLDIV1,
78 .div_reg = PLLDIV2,
85 .div_reg = PLLDIV3,
92 .div_reg = PLLDIV5,
105 .div_reg = BPDIV
119 .div_reg = PLLDIV1,
126 .div_reg = PLLDIV2,
133 .div_reg = BPDIV
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| D | dm355.c | 79 .div_reg = PLLDIV1,
86 .div_reg = PLLDIV2,
93 .div_reg = PLLDIV3,
100 .div_reg = PLLDIV4,
107 .div_reg = BPDIV
151 .div_reg = PLLDIV1,
158 .div_reg = BPDIV
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| D | da850.c | 83 .div_reg = PLLDIV2,
90 .div_reg = PLLDIV3,
99 .div_reg = PLLDIV4,
106 .div_reg = PLLDIV5,
113 .div_reg = PLLDIV6,
120 .div_reg = PLLDIV7,
146 .div_reg = PLLDIV2,
153 .div_reg = PLLDIV3,
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| D | clock.c | 268 if (!clk->div_reg) in clk_sysclk_recalc()
271 v = __raw_readl(pll->base + clk->div_reg); in clk_sysclk_recalc()
301 if (WARN_ON(!clk->div_reg)) in davinci_set_sysclk_rate()
337 v = __raw_readl(pll->base + clk->div_reg); in davinci_set_sysclk_rate()
340 __raw_writel(v, pll->base + clk->div_reg); in davinci_set_sysclk_rate()
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| D | clock.h | 102 u32 div_reg; member
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| D | da830.c | 68 .div_reg = PLLDIV2,
75 .div_reg = PLLDIV3,
82 .div_reg = PLLDIV4,
89 .div_reg = PLLDIV5,
96 .div_reg = PLLDIV6,
103 .div_reg = PLLDIV7,
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| D | tnetv107x.c | 140 .div_reg = PLLDIV##div, \
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