Home
last modified time | relevance | path

Searched refs:dispc (Results 1 – 10 of 10) sorted by relevance

/linux-3.4.99/drivers/video/omap2/dss/
Ddispc.c108 } dispc; variable
126 __raw_writel(val, dispc.base + idx); in dispc_write_reg()
131 return __raw_readl(dispc.base + idx); in dispc_read_reg()
136 struct device *dev = &dispc.pdev->dev; in dispc_get_ctx_loss_count()
152 dispc.ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(DISPC_##reg)
154 dispc_write_reg(DISPC_##reg, dispc.ctx[DISPC_##reg / sizeof(u32)])
254 dispc.ctx_loss_cnt = dispc_get_ctx_loss_count(); in dispc_save_context()
255 dispc.ctx_valid = true; in dispc_save_context()
257 DSSDBG("context saved, ctx_loss_count %d\n", dispc.ctx_loss_cnt); in dispc_save_context()
266 if (!dispc.ctx_valid) in dispc_restore_context()
[all …]
Ddpi.c54 if (dssdev->clocks.dispc.dispc_fclk_src == in dpi_use_dsi_pll()
56 dssdev->clocks.dispc.dispc_fclk_src == in dpi_use_dsi_pll()
58 dssdev->clocks.dispc.channel.lcd_clk_src == in dpi_use_dsi_pll()
60 dssdev->clocks.dispc.channel.lcd_clk_src == in dpi_use_dsi_pll()
84 dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src); in dpi_set_dsi_clk()
374 dssdev->clocks.dispc.dispc_fclk_src; in dpi_init_display()
DMakefile2 omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o display.o \
Dhdmi.c373 dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src); in hdmi_power_on()
Ddsi.c4318 dispc_cinfo.lck_div = dssdev->clocks.dispc.channel.lck_div; in dsi_configure_dispc_clocks()
4319 dispc_cinfo.pck_div = dssdev->clocks.dispc.channel.pck_div; in dsi_configure_dispc_clocks()
4356 dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src); in dsi_display_init_dsi()
4359 dssdev->clocks.dispc.channel.lcd_clk_src); in dsi_display_init_dsi()
/linux-3.4.99/drivers/gpu/drm/nouveau/
Dnv50_evo.c328 struct nv50_display_crtc *dispc = &disp->crtc[i]; in nv50_evo_create() local
331 ret = nv50_evo_channel_new(dev, 1 + i, &dispc->sync); in nv50_evo_create()
336 0, 0x0000, &dispc->sem.bo); in nv50_evo_create()
338 ret = nouveau_bo_pin(dispc->sem.bo, TTM_PL_FLAG_VRAM); in nv50_evo_create()
340 ret = nouveau_bo_map(dispc->sem.bo); in nv50_evo_create()
342 nouveau_bo_ref(NULL, &dispc->sem.bo); in nv50_evo_create()
343 offset = dispc->sem.bo->bo.offset; in nv50_evo_create()
349 ret = nv50_evo_dmaobj_new(dispc->sync, NvEvoSync, 0x0000, in nv50_evo_create()
354 ret = nv50_evo_dmaobj_new(dispc->sync, NvEvoVRAM_LP, 0x80000000, in nv50_evo_create()
359 ret = nv50_evo_dmaobj_new(dispc->sync, NvEvoFB32, 0x80000000 | in nv50_evo_create()
[all …]
Dnv50_display.c431 struct nv50_display_crtc *dispc = &disp->crtc[nv_crtc->index]; in nv50_display_flip_stop() local
432 struct nouveau_channel *evo = dispc->sync; in nv50_display_flip_stop()
460 struct nv50_display_crtc *dispc = &disp->crtc[nv_crtc->index]; in nv50_display_flip_next() local
461 struct nouveau_channel *evo = dispc->sync; in nv50_display_flip_next()
479 OUT_RING (chan, dispc->sem.offset); in nv50_display_flip_next()
481 OUT_RING (chan, 0xf00d0000 | dispc->sem.value); in nv50_display_flip_next()
483 OUT_RING (chan, dispc->sem.offset ^ 0x10); in nv50_display_flip_next()
492 offset += dispc->sem.offset; in nv50_display_flip_next()
496 OUT_RING (chan, 0xf00d0000 | dispc->sem.value); in nv50_display_flip_next()
506 nouveau_bo_wr32(dispc->sem.bo, dispc->sem.offset / 4, in nv50_display_flip_next()
[all …]
Dnouveau_object.c802 struct nv50_display_crtc *dispc = in nouveau_gpuobj_channel_init() local
804 u64 offset = dispc->sem.bo->bo.offset; in nouveau_gpuobj_channel_init()
891 struct nv50_display_crtc *dispc = &disp->crtc[i]; in nouveau_gpuobj_channel_takedown() local
892 nouveau_bo_vma_del(dispc->sem.bo, &chan->dispc_vma[i]); in nouveau_gpuobj_channel_takedown()
/linux-3.4.99/arch/arm/mach-omap2/
Dboard-4430sdp.c688 .dispc = {
737 .dispc = {
/linux-3.4.99/include/video/
Domapdss.h525 } dispc; member