1 /*
2  * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
3  * All rights reserved
4  * www.brocade.com
5  *
6  * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License (GPL) Version 2 as
10  * published by the Free Software Foundation
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  */
17 
18 #ifndef __BFA_DEFS_H__
19 #define __BFA_DEFS_H__
20 
21 #include "bfa_fc.h"
22 #include "bfad_drv.h"
23 
24 #define BFA_MFG_SERIALNUM_SIZE                  11
25 #define STRSZ(_n)                               (((_n) + 4) & ~3)
26 
27 /*
28  * Manufacturing card type
29  */
30 enum {
31 	BFA_MFG_TYPE_CB_MAX  = 825,      /*  Crossbow card type max     */
32 	BFA_MFG_TYPE_FC8P2   = 825,      /*  8G 2port FC card           */
33 	BFA_MFG_TYPE_FC8P1   = 815,      /*  8G 1port FC card           */
34 	BFA_MFG_TYPE_FC4P2   = 425,      /*  4G 2port FC card           */
35 	BFA_MFG_TYPE_FC4P1   = 415,      /*  4G 1port FC card           */
36 	BFA_MFG_TYPE_CNA10P2 = 1020,     /*  10G 2port CNA card */
37 	BFA_MFG_TYPE_CNA10P1 = 1010,     /*  10G 1port CNA card */
38 	BFA_MFG_TYPE_JAYHAWK = 804,      /*  Jayhawk mezz card          */
39 	BFA_MFG_TYPE_WANCHESE = 1007,    /*  Wanchese mezz card */
40 	BFA_MFG_TYPE_ASTRA    = 807,     /*  Astra mezz card            */
41 	BFA_MFG_TYPE_LIGHTNING_P0 = 902, /*  Lightning mezz card - old  */
42 	BFA_MFG_TYPE_LIGHTNING = 1741,   /*  Lightning mezz card        */
43 	BFA_MFG_TYPE_PROWLER_F = 1560,	 /*  Prowler FC only cards	*/
44 	BFA_MFG_TYPE_PROWLER_N = 1410,	 /*  Prowler NIC only cards	*/
45 	BFA_MFG_TYPE_PROWLER_C = 1710,   /*  Prowler CNA only cards	*/
46 	BFA_MFG_TYPE_PROWLER_D = 1860,   /*  Prowler Dual cards		*/
47 	BFA_MFG_TYPE_CHINOOK   = 1867,   /*  Chinook cards		*/
48 	BFA_MFG_TYPE_INVALID = 0,        /*  Invalid card type		*/
49 };
50 
51 #pragma pack(1)
52 
53 /*
54  * Check if Mezz card
55  */
56 #define bfa_mfg_is_mezz(type) (( \
57 	(type) == BFA_MFG_TYPE_JAYHAWK || \
58 	(type) == BFA_MFG_TYPE_WANCHESE || \
59 	(type) == BFA_MFG_TYPE_ASTRA || \
60 	(type) == BFA_MFG_TYPE_LIGHTNING_P0 || \
61 	(type) == BFA_MFG_TYPE_LIGHTNING || \
62 	(type) == BFA_MFG_TYPE_CHINOOK))
63 
64 /*
65  * Check if the card having old wwn/mac handling
66  */
67 #define bfa_mfg_is_old_wwn_mac_model(type) (( \
68 	(type) == BFA_MFG_TYPE_FC8P2 || \
69 	(type) == BFA_MFG_TYPE_FC8P1 || \
70 	(type) == BFA_MFG_TYPE_FC4P2 || \
71 	(type) == BFA_MFG_TYPE_FC4P1 || \
72 	(type) == BFA_MFG_TYPE_CNA10P2 || \
73 	(type) == BFA_MFG_TYPE_CNA10P1 || \
74 	(type) == BFA_MFG_TYPE_JAYHAWK || \
75 	(type) == BFA_MFG_TYPE_WANCHESE))
76 
77 #define bfa_mfg_increment_wwn_mac(m, i)                         \
78 do {                                                            \
79 	u32 t = ((u32)(m)[0] << 16) | ((u32)(m)[1] << 8) | \
80 		(u32)(m)[2];  \
81 	t += (i);      \
82 	(m)[0] = (t >> 16) & 0xFF;                              \
83 	(m)[1] = (t >> 8) & 0xFF;                               \
84 	(m)[2] = t & 0xFF;                                      \
85 } while (0)
86 
87 /*
88  * VPD data length
89  */
90 #define BFA_MFG_VPD_LEN                 512
91 
92 /*
93  * VPD vendor tag
94  */
95 enum {
96 	BFA_MFG_VPD_UNKNOWN     = 0,     /*  vendor unknown             */
97 	BFA_MFG_VPD_IBM         = 1,     /*  vendor IBM                 */
98 	BFA_MFG_VPD_HP          = 2,     /*  vendor HP                  */
99 	BFA_MFG_VPD_DELL        = 3,     /*  vendor DELL                */
100 	BFA_MFG_VPD_PCI_IBM     = 0x08,  /*  PCI VPD IBM                */
101 	BFA_MFG_VPD_PCI_HP      = 0x10,  /*  PCI VPD HP         */
102 	BFA_MFG_VPD_PCI_DELL    = 0x20,  /*  PCI VPD DELL               */
103 	BFA_MFG_VPD_PCI_BRCD    = 0xf8,  /*  PCI VPD Brocade            */
104 };
105 
106 /*
107  * All numerical fields are in big-endian format.
108  */
109 struct bfa_mfg_vpd_s {
110 	u8              version;        /*  vpd data version */
111 	u8              vpd_sig[3];     /*  characters 'V', 'P', 'D' */
112 	u8              chksum;         /*  u8 checksum */
113 	u8              vendor;         /*  vendor */
114 	u8      len;            /*  vpd data length excluding header */
115 	u8      rsv;
116 	u8              data[BFA_MFG_VPD_LEN];  /*  vpd data */
117 };
118 
119 #pragma pack()
120 
121 /*
122  * Status return values
123  */
124 enum bfa_status {
125 	BFA_STATUS_OK		= 0,	/*  Success */
126 	BFA_STATUS_FAILED	= 1,	/*  Operation failed */
127 	BFA_STATUS_EINVAL	= 2,	/*  Invalid params Check input
128 					 *  parameters */
129 	BFA_STATUS_ENOMEM	= 3,	/*  Out of resources */
130 	BFA_STATUS_ETIMER	= 5,	/*  Timer expired - Retry, if persists,
131 					 *  contact support */
132 	BFA_STATUS_EPROTOCOL	= 6,	/*  Protocol error */
133 	BFA_STATUS_SFP_UNSUPP	= 10,	/*  Unsupported SFP - Replace SFP */
134 	BFA_STATUS_UNKNOWN_VFID = 11,	/*  VF_ID not found */
135 	BFA_STATUS_DATACORRUPTED = 12,  /*  Diag returned data corrupted */
136 	BFA_STATUS_DEVBUSY	= 13,	/*  Device busy - Retry operation */
137 	BFA_STATUS_HDMA_FAILED  = 16,   /* Host dma failed contact support */
138 	BFA_STATUS_FLASH_BAD_LEN = 17,	/*  Flash bad length */
139 	BFA_STATUS_UNKNOWN_LWWN = 18,	/*  LPORT PWWN not found */
140 	BFA_STATUS_UNKNOWN_RWWN = 19,	/*  RPORT PWWN not found */
141 	BFA_STATUS_VPORT_EXISTS = 21,	/*  VPORT already exists */
142 	BFA_STATUS_VPORT_MAX	= 22,	/*  Reached max VPORT supported limit */
143 	BFA_STATUS_UNSUPP_SPEED	= 23,	/*  Invalid Speed Check speed setting */
144 	BFA_STATUS_INVLD_DFSZ	= 24,	/*  Invalid Max data field size */
145 	BFA_STATUS_CMD_NOTSUPP  = 26,   /*  Command/API not supported */
146 	BFA_STATUS_FABRIC_RJT	= 29,	/*  Reject from attached fabric */
147 	BFA_STATUS_UNKNOWN_VWWN = 30,	/*  VPORT PWWN not found */
148 	BFA_STATUS_PORT_OFFLINE = 34,	/*  Port is not online */
149 	BFA_STATUS_VPORT_WWN_BP	= 46,	/*  WWN is same as base port's WWN */
150 	BFA_STATUS_PORT_NOT_DISABLED = 47, /* Port not disabled disable port */
151 	BFA_STATUS_NO_FCPIM_NEXUS = 52,	/* No FCP Nexus exists with the rport */
152 	BFA_STATUS_IOC_FAILURE	= 56,	/* IOC failure - Retry, if persists
153 					 * contact support */
154 	BFA_STATUS_INVALID_WWN	= 57,	/*  Invalid WWN */
155 	BFA_STATUS_ADAPTER_ENABLED = 60, /* Adapter is not disabled */
156 	BFA_STATUS_IOC_NON_OP   = 61,	/* IOC is not operational */
157 	BFA_STATUS_VERSION_FAIL = 70, /* Application/Driver version mismatch */
158 	BFA_STATUS_DIAG_BUSY	= 71,	/*  diag busy */
159 	BFA_STATUS_BEACON_ON    = 72,   /* Port Beacon already on */
160 	BFA_STATUS_ENOFSAVE	= 78,	/*  No saved firmware trace */
161 	BFA_STATUS_IOC_DISABLED = 82,   /* IOC is already disabled */
162 	BFA_STATUS_NO_SFP_DEV = 89,	/* No SFP device check or replace SFP */
163 	BFA_STATUS_MEMTEST_FAILED = 90, /* Memory test failed contact support */
164 	BFA_STATUS_LEDTEST_OP = 109, /* LED test is operating */
165 	BFA_STATUS_INVALID_MAC  = 134, /*  Invalid MAC address */
166 	BFA_STATUS_PBC		= 154, /*  Operation not allowed for pre-boot
167 					*  configuration */
168 	BFA_STATUS_BAD_FWCFG = 156,	/* Bad firmware configuration */
169 	BFA_STATUS_INVALID_VENDOR = 158, /* Invalid switch vendor */
170 	BFA_STATUS_SFP_NOT_READY = 159,	/* SFP info is not ready. Retry */
171 	BFA_STATUS_TRUNK_ENABLED = 164, /* Trunk is already enabled on
172 					 * this adapter */
173 	BFA_STATUS_TRUNK_DISABLED  = 165, /* Trunking is disabled on
174 					   * the adapter */
175 	BFA_STATUS_IOPROFILE_OFF = 175, /* IO profile OFF */
176 	BFA_STATUS_PHY_NOT_PRESENT = 183, /* PHY module not present */
177 	BFA_STATUS_FEATURE_NOT_SUPPORTED = 192,	/* Feature not supported */
178 	BFA_STATUS_ENTRY_EXISTS = 193,	/* Entry already exists */
179 	BFA_STATUS_ENTRY_NOT_EXISTS = 194, /* Entry does not exist */
180 	BFA_STATUS_NO_CHANGE = 195,	/* Feature already in that state */
181 	BFA_STATUS_FAA_ENABLED = 197,	/* FAA is already enabled */
182 	BFA_STATUS_FAA_DISABLED = 198,	/* FAA is already disabled */
183 	BFA_STATUS_FAA_ACQUIRED = 199,	/* FAA is already acquired */
184 	BFA_STATUS_FAA_ACQ_ADDR = 200,	/* Acquiring addr */
185 	BFA_STATUS_ERROR_TRUNK_ENABLED = 203,	/* Trunk enabled on adapter */
186 	BFA_STATUS_MAX_ENTRY_REACHED = 212,	/* MAX entry reached */
187 	BFA_STATUS_MAX_VAL		/* Unknown error code */
188 };
189 #define bfa_status_t enum bfa_status
190 
191 enum bfa_eproto_status {
192 	BFA_EPROTO_BAD_ACCEPT = 0,
193 	BFA_EPROTO_UNKNOWN_RSP = 1
194 };
195 #define bfa_eproto_status_t enum bfa_eproto_status
196 
197 enum bfa_boolean {
198 	BFA_FALSE = 0,
199 	BFA_TRUE  = 1
200 };
201 #define bfa_boolean_t enum bfa_boolean
202 
203 #define BFA_STRING_32	32
204 #define BFA_VERSION_LEN 64
205 
206 /*
207  * ---------------------- adapter definitions ------------
208  */
209 
210 /*
211  * BFA adapter level attributes.
212  */
213 enum {
214 	BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE),
215 					/*
216 					 *!< adapter serial num length
217 					 */
218 	BFA_ADAPTER_MODEL_NAME_LEN  = 16,  /*  model name length */
219 	BFA_ADAPTER_MODEL_DESCR_LEN = 128, /*  model description length */
220 	BFA_ADAPTER_MFG_NAME_LEN    = 8,   /*  manufacturer name length */
221 	BFA_ADAPTER_SYM_NAME_LEN    = 64,  /*  adapter symbolic name length */
222 	BFA_ADAPTER_OS_TYPE_LEN	    = 64,  /*  adapter os type length */
223 };
224 
225 struct bfa_adapter_attr_s {
226 	char		manufacturer[BFA_ADAPTER_MFG_NAME_LEN];
227 	char		serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
228 	u32	card_type;
229 	char		model[BFA_ADAPTER_MODEL_NAME_LEN];
230 	char		model_descr[BFA_ADAPTER_MODEL_DESCR_LEN];
231 	wwn_t		pwwn;
232 	char		node_symname[FC_SYMNAME_MAX];
233 	char		hw_ver[BFA_VERSION_LEN];
234 	char		fw_ver[BFA_VERSION_LEN];
235 	char		optrom_ver[BFA_VERSION_LEN];
236 	char		os_type[BFA_ADAPTER_OS_TYPE_LEN];
237 	struct bfa_mfg_vpd_s	vpd;
238 	struct mac_s	mac;
239 
240 	u8		nports;
241 	u8		max_speed;
242 	u8		prototype;
243 	char	        asic_rev;
244 
245 	u8		pcie_gen;
246 	u8		pcie_lanes_orig;
247 	u8		pcie_lanes;
248 	u8	        cna_capable;
249 
250 	u8		is_mezz;
251 	u8		trunk_capable;
252 };
253 
254 /*
255  * ---------------------- IOC definitions ------------
256  */
257 
258 enum {
259 	BFA_IOC_DRIVER_LEN	= 16,
260 	BFA_IOC_CHIP_REV_LEN	= 8,
261 };
262 
263 /*
264  * Driver and firmware versions.
265  */
266 struct bfa_ioc_driver_attr_s {
267 	char		driver[BFA_IOC_DRIVER_LEN];	/*  driver name */
268 	char		driver_ver[BFA_VERSION_LEN];	/*  driver version */
269 	char		fw_ver[BFA_VERSION_LEN];	/*  firmware version */
270 	char		bios_ver[BFA_VERSION_LEN];	/*  bios version */
271 	char		efi_ver[BFA_VERSION_LEN];	/*  EFI version */
272 	char		ob_ver[BFA_VERSION_LEN];	/*  openboot version */
273 };
274 
275 /*
276  * IOC PCI device attributes
277  */
278 struct bfa_ioc_pci_attr_s {
279 	u16	vendor_id;	/*  PCI vendor ID */
280 	u16	device_id;	/*  PCI device ID */
281 	u16	ssid;		/*  subsystem ID */
282 	u16	ssvid;		/*  subsystem vendor ID */
283 	u32	pcifn;		/*  PCI device function */
284 	u32	rsvd;		/* padding */
285 	char		chip_rev[BFA_IOC_CHIP_REV_LEN];	 /*  chip revision */
286 };
287 
288 /*
289  * IOC states
290  */
291 enum bfa_ioc_state {
292 	BFA_IOC_UNINIT		= 1,	/*  IOC is in uninit state */
293 	BFA_IOC_RESET		= 2,	/*  IOC is in reset state */
294 	BFA_IOC_SEMWAIT		= 3,	/*  Waiting for IOC h/w semaphore */
295 	BFA_IOC_HWINIT		= 4,	/*  IOC h/w is being initialized */
296 	BFA_IOC_GETATTR		= 5,	/*  IOC is being configured */
297 	BFA_IOC_OPERATIONAL	= 6,	/*  IOC is operational */
298 	BFA_IOC_INITFAIL	= 7,	/*  IOC hardware failure */
299 	BFA_IOC_FAIL		= 8,	/*  IOC heart-beat failure */
300 	BFA_IOC_DISABLING	= 9,	/*  IOC is being disabled */
301 	BFA_IOC_DISABLED	= 10,	/*  IOC is disabled */
302 	BFA_IOC_FWMISMATCH	= 11,	/*  IOC f/w different from drivers */
303 	BFA_IOC_ENABLING	= 12,	/*  IOC is being enabled */
304 	BFA_IOC_HWFAIL		= 13,	/*  PCI mapping doesn't exist */
305 	BFA_IOC_ACQ_ADDR	= 14,	/*  Acquiring addr from fabric */
306 };
307 
308 /*
309  * IOC firmware stats
310  */
311 struct bfa_fw_ioc_stats_s {
312 	u32	enable_reqs;
313 	u32	disable_reqs;
314 	u32	get_attr_reqs;
315 	u32	dbg_sync;
316 	u32	dbg_dump;
317 	u32	unknown_reqs;
318 };
319 
320 /*
321  * IOC driver stats
322  */
323 struct bfa_ioc_drv_stats_s {
324 	u32	ioc_isrs;
325 	u32	ioc_enables;
326 	u32	ioc_disables;
327 	u32	ioc_hbfails;
328 	u32	ioc_boots;
329 	u32	stats_tmos;
330 	u32	hb_count;
331 	u32	disable_reqs;
332 	u32	enable_reqs;
333 	u32	disable_replies;
334 	u32	enable_replies;
335 	u32	rsvd;
336 };
337 
338 /*
339  * IOC statistics
340  */
341 struct bfa_ioc_stats_s {
342 	struct bfa_ioc_drv_stats_s	drv_stats; /*  driver IOC stats */
343 	struct bfa_fw_ioc_stats_s	fw_stats;  /*  firmware IOC stats */
344 };
345 
346 enum bfa_ioc_type_e {
347 	BFA_IOC_TYPE_FC		= 1,
348 	BFA_IOC_TYPE_FCoE	= 2,
349 	BFA_IOC_TYPE_LL		= 3,
350 };
351 
352 /*
353  * IOC attributes returned in queries
354  */
355 struct bfa_ioc_attr_s {
356 	enum bfa_ioc_type_e		ioc_type;
357 	enum bfa_ioc_state		state;		/*  IOC state      */
358 	struct bfa_adapter_attr_s	adapter_attr;	/*  HBA attributes */
359 	struct bfa_ioc_driver_attr_s	driver_attr;	/*  driver attr    */
360 	struct bfa_ioc_pci_attr_s	pci_attr;
361 	u8				port_id;	/*  port number    */
362 	u8				port_mode;	/*  bfa_mode_s	*/
363 	u8				cap_bm;		/*  capability	*/
364 	u8				port_mode_cfg;	/*  bfa_mode_s	*/
365 	u8				rsvd[4];	/*  64bit align	*/
366 };
367 
368 /*
369  *			AEN related definitions
370  */
371 enum bfa_aen_category {
372 	BFA_AEN_CAT_ADAPTER	= 1,
373 	BFA_AEN_CAT_PORT	= 2,
374 	BFA_AEN_CAT_LPORT	= 3,
375 	BFA_AEN_CAT_RPORT	= 4,
376 	BFA_AEN_CAT_ITNIM	= 5,
377 	BFA_AEN_CAT_AUDIT	= 8,
378 	BFA_AEN_CAT_IOC		= 9,
379 };
380 
381 /* BFA adapter level events */
382 enum bfa_adapter_aen_event {
383 	BFA_ADAPTER_AEN_ADD	= 1,	/* New Adapter found event */
384 	BFA_ADAPTER_AEN_REMOVE	= 2,	/* Adapter removed event */
385 };
386 
387 struct bfa_adapter_aen_data_s {
388 	char	serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
389 	u32	nports; /* Number of NPorts */
390 	wwn_t	pwwn;   /* WWN of one of its physical port */
391 };
392 
393 /* BFA physical port Level events */
394 enum bfa_port_aen_event {
395 	BFA_PORT_AEN_ONLINE	= 1,    /* Physical Port online event */
396 	BFA_PORT_AEN_OFFLINE	= 2,    /* Physical Port offline event */
397 	BFA_PORT_AEN_RLIR	= 3,    /* RLIR event, not supported */
398 	BFA_PORT_AEN_SFP_INSERT	= 4,    /* SFP inserted event */
399 	BFA_PORT_AEN_SFP_REMOVE	= 5,    /* SFP removed event */
400 	BFA_PORT_AEN_SFP_POM	= 6,    /* SFP POM event */
401 	BFA_PORT_AEN_ENABLE	= 7,    /* Physical Port enable event */
402 	BFA_PORT_AEN_DISABLE	= 8,    /* Physical Port disable event */
403 	BFA_PORT_AEN_AUTH_ON	= 9,    /* Physical Port auth success event */
404 	BFA_PORT_AEN_AUTH_OFF	= 10,   /* Physical Port auth fail event */
405 	BFA_PORT_AEN_DISCONNECT	= 11,   /* Physical Port disconnect event */
406 	BFA_PORT_AEN_QOS_NEG	= 12,   /* Base Port QOS negotiation event */
407 	BFA_PORT_AEN_FABRIC_NAME_CHANGE	= 13, /* Fabric Name/WWN change */
408 	BFA_PORT_AEN_SFP_ACCESS_ERROR	= 14, /* SFP read error event */
409 	BFA_PORT_AEN_SFP_UNSUPPORT	= 15, /* Unsupported SFP event */
410 };
411 
412 enum bfa_port_aen_sfp_pom {
413 	BFA_PORT_AEN_SFP_POM_GREEN = 1, /* Normal */
414 	BFA_PORT_AEN_SFP_POM_AMBER = 2, /* Warning */
415 	BFA_PORT_AEN_SFP_POM_RED   = 3, /* Critical */
416 	BFA_PORT_AEN_SFP_POM_MAX   = BFA_PORT_AEN_SFP_POM_RED
417 };
418 
419 struct bfa_port_aen_data_s {
420 	wwn_t		pwwn;		/* WWN of the physical port */
421 	wwn_t		fwwn;		/* WWN of the fabric port */
422 	u32		phy_port_num;	/* For SFP related events */
423 	u16		ioc_type;
424 	u16		level;		/* Only transitions will be informed */
425 	mac_t		mac;		/* MAC address of the ethernet port */
426 	u16		rsvd;
427 };
428 
429 /* BFA AEN logical port events */
430 enum bfa_lport_aen_event {
431 	BFA_LPORT_AEN_NEW	= 1,		/* LPort created event */
432 	BFA_LPORT_AEN_DELETE	= 2,		/* LPort deleted event */
433 	BFA_LPORT_AEN_ONLINE	= 3,		/* LPort online event */
434 	BFA_LPORT_AEN_OFFLINE	= 4,		/* LPort offline event */
435 	BFA_LPORT_AEN_DISCONNECT = 5,		/* LPort disconnect event */
436 	BFA_LPORT_AEN_NEW_PROP	= 6,		/* VPort created event */
437 	BFA_LPORT_AEN_DELETE_PROP = 7,		/* VPort deleted event */
438 	BFA_LPORT_AEN_NEW_STANDARD = 8,		/* VPort created event */
439 	BFA_LPORT_AEN_DELETE_STANDARD = 9,	/* VPort deleted event */
440 	BFA_LPORT_AEN_NPIV_DUP_WWN = 10,	/* VPort with duplicate WWN */
441 	BFA_LPORT_AEN_NPIV_FABRIC_MAX = 11,	/* Max NPIV in fabric/fport */
442 	BFA_LPORT_AEN_NPIV_UNKNOWN = 12,	/* Unknown NPIV Error code */
443 };
444 
445 struct bfa_lport_aen_data_s {
446 	u16	vf_id;	/* vf_id of this logical port */
447 	u16	roles;	/* Logical port mode,IM/TM/IP etc */
448 	u32	rsvd;
449 	wwn_t	ppwwn;	/* WWN of its physical port */
450 	wwn_t	lpwwn;	/* WWN of this logical port */
451 };
452 
453 /* BFA ITNIM events */
454 enum bfa_itnim_aen_event {
455 	BFA_ITNIM_AEN_ONLINE	 = 1,	/* Target online */
456 	BFA_ITNIM_AEN_OFFLINE	 = 2,	/* Target offline */
457 	BFA_ITNIM_AEN_DISCONNECT = 3,	/* Target disconnected */
458 };
459 
460 struct bfa_itnim_aen_data_s {
461 	u16		vf_id;		/* vf_id of the IT nexus */
462 	u16		rsvd[3];
463 	wwn_t		ppwwn;		/* WWN of its physical port */
464 	wwn_t		lpwwn;		/* WWN of logical port */
465 	wwn_t		rpwwn;		/* WWN of remote(target) port */
466 };
467 
468 /* BFA audit events */
469 enum bfa_audit_aen_event {
470 	BFA_AUDIT_AEN_AUTH_ENABLE	= 1,
471 	BFA_AUDIT_AEN_AUTH_DISABLE	= 2,
472 	BFA_AUDIT_AEN_FLASH_ERASE	= 3,
473 	BFA_AUDIT_AEN_FLASH_UPDATE	= 4,
474 };
475 
476 struct bfa_audit_aen_data_s {
477 	wwn_t	pwwn;
478 	int	partition_inst;
479 	int	partition_type;
480 };
481 
482 /* BFA IOC level events */
483 enum bfa_ioc_aen_event {
484 	BFA_IOC_AEN_HBGOOD  = 1,	/* Heart Beat restore event	*/
485 	BFA_IOC_AEN_HBFAIL  = 2,	/* Heart Beat failure event	*/
486 	BFA_IOC_AEN_ENABLE  = 3,	/* IOC enabled event		*/
487 	BFA_IOC_AEN_DISABLE = 4,	/* IOC disabled event		*/
488 	BFA_IOC_AEN_FWMISMATCH  = 5,	/* IOC firmware mismatch	*/
489 	BFA_IOC_AEN_FWCFG_ERROR = 6,	/* IOC firmware config error	*/
490 	BFA_IOC_AEN_INVALID_VENDOR = 7,
491 	BFA_IOC_AEN_INVALID_NWWN = 8,	/* Zero NWWN			*/
492 	BFA_IOC_AEN_INVALID_PWWN = 9	/* Zero PWWN			*/
493 };
494 
495 struct bfa_ioc_aen_data_s {
496 	wwn_t	pwwn;
497 	u16	ioc_type;
498 	mac_t	mac;
499 };
500 
501 /*
502  * ---------------------- mfg definitions ------------
503  */
504 
505 /*
506  * Checksum size
507  */
508 #define BFA_MFG_CHKSUM_SIZE			16
509 
510 #define BFA_MFG_PARTNUM_SIZE			14
511 #define BFA_MFG_SUPPLIER_ID_SIZE		10
512 #define BFA_MFG_SUPPLIER_PARTNUM_SIZE		20
513 #define BFA_MFG_SUPPLIER_SERIALNUM_SIZE		20
514 #define BFA_MFG_SUPPLIER_REVISION_SIZE		4
515 /*
516  * Initial capability definition
517  */
518 #define BFA_MFG_IC_FC	0x01
519 #define BFA_MFG_IC_ETH	0x02
520 
521 /*
522  * Adapter capability mask definition
523  */
524 #define BFA_CM_HBA	0x01
525 #define BFA_CM_CNA	0x02
526 #define BFA_CM_NIC	0x04
527 #define BFA_CM_FC16G	0x08
528 #define BFA_CM_SRIOV	0x10
529 #define BFA_CM_MEZZ	0x20
530 
531 #pragma pack(1)
532 
533 /*
534  * All numerical fields are in big-endian format.
535  */
536 struct bfa_mfg_block_s {
537 	u8	version;    /*!< manufacturing block version */
538 	u8     mfg_sig[3]; /*!< characters 'M', 'F', 'G' */
539 	u16    mfgsize;    /*!< mfg block size */
540 	u16    u16_chksum; /*!< old u16 checksum */
541 	char        brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
542 	char        brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)];
543 	u8     mfg_day;    /*!< manufacturing day */
544 	u8     mfg_month;  /*!< manufacturing month */
545 	u16    mfg_year;   /*!< manufacturing year */
546 	wwn_t       mfg_wwn;    /*!< wwn base for this adapter */
547 	u8     num_wwn;    /*!< number of wwns assigned */
548 	u8     mfg_speeds; /*!< speeds allowed for this adapter */
549 	u8     rsv[2];
550 	char    supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)];
551 	char    supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)];
552 	char    supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)];
553 	char    supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)];
554 	mac_t       mfg_mac;    /*!< base mac address */
555 	u8     num_mac;    /*!< number of mac addresses */
556 	u8     rsv2;
557 	u32    card_type;  /*!< card type          */
558 	char        cap_nic;    /*!< capability nic     */
559 	char        cap_cna;    /*!< capability cna     */
560 	char        cap_hba;    /*!< capability hba     */
561 	char        cap_fc16g;  /*!< capability fc 16g      */
562 	char        cap_sriov;  /*!< capability sriov       */
563 	char        cap_mezz;   /*!< capability mezz        */
564 	u8     rsv3;
565 	u8     mfg_nports; /*!< number of ports        */
566 	char        media[8];   /*!< xfi/xaui           */
567 	char        initial_mode[8]; /*!< initial mode: hba/cna/nic */
568 	u8     rsv4[84];
569 	u8     md5_chksum[BFA_MFG_CHKSUM_SIZE]; /*!< md5 checksum */
570 };
571 
572 #pragma pack()
573 
574 /*
575  * ---------------------- pci definitions ------------
576  */
577 
578 /*
579  * PCI device and vendor ID information
580  */
581 enum {
582 	BFA_PCI_VENDOR_ID_BROCADE	= 0x1657,
583 	BFA_PCI_DEVICE_ID_FC_8G2P	= 0x13,
584 	BFA_PCI_DEVICE_ID_FC_8G1P	= 0x17,
585 	BFA_PCI_DEVICE_ID_CT		= 0x14,
586 	BFA_PCI_DEVICE_ID_CT_FC		= 0x21,
587 	BFA_PCI_DEVICE_ID_CT2		= 0x22,
588 };
589 
590 #define bfa_asic_id_cb(__d)			\
591 	((__d) == BFA_PCI_DEVICE_ID_FC_8G2P ||	\
592 	 (__d) == BFA_PCI_DEVICE_ID_FC_8G1P)
593 #define bfa_asic_id_ct(__d)			\
594 	((__d) == BFA_PCI_DEVICE_ID_CT ||	\
595 	 (__d) == BFA_PCI_DEVICE_ID_CT_FC)
596 #define bfa_asic_id_ct2(__d)	((__d) == BFA_PCI_DEVICE_ID_CT2)
597 #define bfa_asic_id_ctc(__d)	\
598 	(bfa_asic_id_ct(__d) || bfa_asic_id_ct2(__d))
599 
600 /*
601  * PCI sub-system device and vendor ID information
602  */
603 enum {
604 	BFA_PCI_FCOE_SSDEVICE_ID	= 0x14,
605 	BFA_PCI_CT2_SSID_FCoE		= 0x22,
606 	BFA_PCI_CT2_SSID_ETH		= 0x23,
607 	BFA_PCI_CT2_SSID_FC		= 0x24,
608 };
609 
610 /*
611  * Maximum number of device address ranges mapped through different BAR(s)
612  */
613 #define BFA_PCI_ACCESS_RANGES 1
614 
615 /*
616  *	Port speed settings. Each specific speed is a bit field. Use multiple
617  *	bits to specify speeds to be selected for auto-negotiation.
618  */
619 enum bfa_port_speed {
620 	BFA_PORT_SPEED_UNKNOWN = 0,
621 	BFA_PORT_SPEED_1GBPS	= 1,
622 	BFA_PORT_SPEED_2GBPS	= 2,
623 	BFA_PORT_SPEED_4GBPS	= 4,
624 	BFA_PORT_SPEED_8GBPS	= 8,
625 	BFA_PORT_SPEED_10GBPS	= 10,
626 	BFA_PORT_SPEED_16GBPS	= 16,
627 	BFA_PORT_SPEED_AUTO	= 0xf,
628 };
629 #define bfa_port_speed_t enum bfa_port_speed
630 
631 enum {
632 	BFA_BOOT_BOOTLUN_MAX = 4,       /*  maximum boot lun per IOC */
633 	BFA_PREBOOT_BOOTLUN_MAX = 8,    /*  maximum preboot lun per IOC */
634 };
635 
636 #define BOOT_CFG_REV1   1
637 #define BOOT_CFG_VLAN   1
638 
639 /*
640  *      Boot options setting. Boot options setting determines from where
641  *      to get the boot lun information
642  */
643 enum bfa_boot_bootopt {
644 	BFA_BOOT_AUTO_DISCOVER  = 0, /*  Boot from blun provided by fabric */
645 	BFA_BOOT_STORED_BLUN = 1, /*  Boot from bluns stored in flash */
646 	BFA_BOOT_FIRST_LUN      = 2, /*  Boot from first discovered blun */
647 	BFA_BOOT_PBC    = 3, /*  Boot from pbc configured blun  */
648 };
649 
650 #pragma pack(1)
651 /*
652  * Boot lun information.
653  */
654 struct bfa_boot_bootlun_s {
655 	wwn_t   pwwn;		/*  port wwn of target */
656 	struct scsi_lun   lun;  /*  64-bit lun */
657 };
658 #pragma pack()
659 
660 /*
661  * BOOT boot configuraton
662  */
663 struct bfa_boot_cfg_s {
664 	u8		version;
665 	u8		rsvd1;
666 	u16		chksum;
667 	u8		enable;		/* enable/disable SAN boot */
668 	u8		speed;          /* boot speed settings */
669 	u8		topology;       /* boot topology setting */
670 	u8		bootopt;        /* bfa_boot_bootopt_t */
671 	u32		nbluns;         /* number of boot luns */
672 	u32		rsvd2;
673 	struct bfa_boot_bootlun_s blun[BFA_BOOT_BOOTLUN_MAX];
674 	struct bfa_boot_bootlun_s blun_disc[BFA_BOOT_BOOTLUN_MAX];
675 };
676 
677 struct bfa_boot_pbc_s {
678 	u8              enable;         /*  enable/disable SAN boot */
679 	u8              speed;          /*  boot speed settings */
680 	u8              topology;       /*  boot topology setting */
681 	u8              rsvd1;
682 	u32     nbluns;         /*  number of boot luns */
683 	struct bfa_boot_bootlun_s pblun[BFA_PREBOOT_BOOTLUN_MAX];
684 };
685 
686 struct bfa_ethboot_cfg_s {
687 	u8		version;
688 	u8		rsvd1;
689 	u16		chksum;
690 	u8		enable;	/* enable/disable Eth/PXE boot */
691 	u8		rsvd2;
692 	u16		vlan;
693 };
694 
695 /*
696  * ASIC block configuration related structures
697  */
698 #define BFA_ABLK_MAX_PORTS	2
699 #define BFA_ABLK_MAX_PFS	16
700 #define BFA_ABLK_MAX		2
701 
702 #pragma pack(1)
703 enum bfa_mode_s {
704 	BFA_MODE_HBA	= 1,
705 	BFA_MODE_CNA	= 2,
706 	BFA_MODE_NIC	= 3
707 };
708 
709 struct bfa_adapter_cfg_mode_s {
710 	u16	max_pf;
711 	u16	max_vf;
712 	enum bfa_mode_s	mode;
713 };
714 
715 struct bfa_ablk_cfg_pf_s {
716 	u16	pers;
717 	u8	port_id;
718 	u8	optrom;
719 	u8	valid;
720 	u8	sriov;
721 	u8	max_vfs;
722 	u8	rsvd[1];
723 	u16	num_qpairs;
724 	u16	num_vectors;
725 	u32	bw;
726 };
727 
728 struct bfa_ablk_cfg_port_s {
729 	u8	mode;
730 	u8	type;
731 	u8	max_pfs;
732 	u8	rsvd[5];
733 };
734 
735 struct bfa_ablk_cfg_inst_s {
736 	u8	nports;
737 	u8	max_pfs;
738 	u8	rsvd[6];
739 	struct bfa_ablk_cfg_pf_s	pf_cfg[BFA_ABLK_MAX_PFS];
740 	struct bfa_ablk_cfg_port_s	port_cfg[BFA_ABLK_MAX_PORTS];
741 };
742 
743 struct bfa_ablk_cfg_s {
744 	struct bfa_ablk_cfg_inst_s	inst[BFA_ABLK_MAX];
745 };
746 
747 
748 /*
749  *	SFP module specific
750  */
751 #define SFP_DIAGMON_SIZE	10 /* num bytes of diag monitor data */
752 
753 /* SFP state change notification event */
754 #define BFA_SFP_SCN_REMOVED	0
755 #define BFA_SFP_SCN_INSERTED	1
756 #define BFA_SFP_SCN_POM		2
757 #define BFA_SFP_SCN_FAILED	3
758 #define BFA_SFP_SCN_UNSUPPORT	4
759 #define BFA_SFP_SCN_VALID	5
760 
761 enum bfa_defs_sfp_media_e {
762 	BFA_SFP_MEDIA_UNKNOWN	= 0x00,
763 	BFA_SFP_MEDIA_CU	= 0x01,
764 	BFA_SFP_MEDIA_LW	= 0x02,
765 	BFA_SFP_MEDIA_SW	= 0x03,
766 	BFA_SFP_MEDIA_EL	= 0x04,
767 	BFA_SFP_MEDIA_UNSUPPORT	= 0x05,
768 };
769 
770 /*
771  * values for xmtr_tech above
772  */
773 enum {
774 	SFP_XMTR_TECH_CU = (1 << 0),	/* copper FC-BaseT */
775 	SFP_XMTR_TECH_CP = (1 << 1),	/* copper passive */
776 	SFP_XMTR_TECH_CA = (1 << 2),	/* copper active */
777 	SFP_XMTR_TECH_LL = (1 << 3),	/* longwave laser */
778 	SFP_XMTR_TECH_SL = (1 << 4),	/* shortwave laser w/ OFC */
779 	SFP_XMTR_TECH_SN = (1 << 5),	/* shortwave laser w/o OFC */
780 	SFP_XMTR_TECH_EL_INTRA = (1 << 6), /* elec intra-enclosure */
781 	SFP_XMTR_TECH_EL_INTER = (1 << 7), /* elec inter-enclosure */
782 	SFP_XMTR_TECH_LC = (1 << 8),	/* longwave laser */
783 	SFP_XMTR_TECH_SA = (1 << 9)
784 };
785 
786 /*
787  * Serial ID: Data Fields -- Address A0h
788  * Basic ID field total 64 bytes
789  */
790 struct sfp_srlid_base_s {
791 	u8	id;		/* 00: Identifier */
792 	u8	extid;		/* 01: Extended Identifier */
793 	u8	connector;	/* 02: Connector */
794 	u8	xcvr[8];	/* 03-10: Transceiver */
795 	u8	encoding;	/* 11: Encoding */
796 	u8	br_norm;	/* 12: BR, Nominal */
797 	u8	rate_id;	/* 13: Rate Identifier */
798 	u8	len_km;		/* 14: Length single mode km */
799 	u8	len_100m;	/* 15: Length single mode 100m */
800 	u8	len_om2;	/* 16: Length om2 fiber 10m */
801 	u8	len_om1;	/* 17: Length om1 fiber 10m */
802 	u8	len_cu;		/* 18: Length copper 1m */
803 	u8	len_om3;	/* 19: Length om3 fiber 10m */
804 	u8	vendor_name[16];/* 20-35 */
805 	u8	unalloc1;
806 	u8	vendor_oui[3];	/* 37-39 */
807 	u8	vendor_pn[16];	/* 40-55 */
808 	u8	vendor_rev[4];	/* 56-59 */
809 	u8	wavelen[2];	/* 60-61 */
810 	u8	unalloc2;
811 	u8	cc_base;	/* 63: check code for base id field */
812 };
813 
814 /*
815  * Serial ID: Data Fields -- Address A0h
816  * Extended id field total 32 bytes
817  */
818 struct sfp_srlid_ext_s {
819 	u8	options[2];
820 	u8	br_max;
821 	u8	br_min;
822 	u8	vendor_sn[16];
823 	u8	date_code[8];
824 	u8	diag_mon_type;  /* 92: Diagnostic Monitoring type */
825 	u8	en_options;
826 	u8	sff_8472;
827 	u8	cc_ext;
828 };
829 
830 /*
831  * Diagnostic: Data Fields -- Address A2h
832  * Diagnostic and control/status base field total 96 bytes
833  */
834 struct sfp_diag_base_s {
835 	/*
836 	 * Alarm and warning Thresholds 40 bytes
837 	 */
838 	u8	temp_high_alarm[2]; /* 00-01 */
839 	u8	temp_low_alarm[2];  /* 02-03 */
840 	u8	temp_high_warning[2];   /* 04-05 */
841 	u8	temp_low_warning[2];    /* 06-07 */
842 
843 	u8	volt_high_alarm[2]; /* 08-09 */
844 	u8	volt_low_alarm[2];  /* 10-11 */
845 	u8	volt_high_warning[2];   /* 12-13 */
846 	u8	volt_low_warning[2];    /* 14-15 */
847 
848 	u8	bias_high_alarm[2]; /* 16-17 */
849 	u8	bias_low_alarm[2];  /* 18-19 */
850 	u8	bias_high_warning[2];   /* 20-21 */
851 	u8	bias_low_warning[2];    /* 22-23 */
852 
853 	u8	tx_pwr_high_alarm[2];   /* 24-25 */
854 	u8	tx_pwr_low_alarm[2];    /* 26-27 */
855 	u8	tx_pwr_high_warning[2]; /* 28-29 */
856 	u8	tx_pwr_low_warning[2];  /* 30-31 */
857 
858 	u8	rx_pwr_high_alarm[2];   /* 32-33 */
859 	u8	rx_pwr_low_alarm[2];    /* 34-35 */
860 	u8	rx_pwr_high_warning[2]; /* 36-37 */
861 	u8	rx_pwr_low_warning[2];  /* 38-39 */
862 
863 	u8	unallocate_1[16];
864 
865 	/*
866 	 * ext_cal_const[36]
867 	 */
868 	u8	rx_pwr[20];
869 	u8	tx_i[4];
870 	u8	tx_pwr[4];
871 	u8	temp[4];
872 	u8	volt[4];
873 	u8	unallocate_2[3];
874 	u8	cc_dmi;
875 };
876 
877 /*
878  * Diagnostic: Data Fields -- Address A2h
879  * Diagnostic and control/status extended field total 24 bytes
880  */
881 struct sfp_diag_ext_s {
882 	u8	diag[SFP_DIAGMON_SIZE];
883 	u8	unalloc1[4];
884 	u8	status_ctl;
885 	u8	rsvd;
886 	u8	alarm_flags[2];
887 	u8	unalloc2[2];
888 	u8	warning_flags[2];
889 	u8	ext_status_ctl[2];
890 };
891 
892 struct sfp_mem_s {
893 	struct sfp_srlid_base_s	srlid_base;
894 	struct sfp_srlid_ext_s	srlid_ext;
895 	struct sfp_diag_base_s	diag_base;
896 	struct sfp_diag_ext_s	diag_ext;
897 };
898 
899 /*
900  * transceiver codes (SFF-8472 Rev 10.2 Table 3.5)
901  */
902 union sfp_xcvr_e10g_code_u {
903 	u8		b;
904 	struct {
905 #ifdef __BIG_ENDIAN
906 		u8	e10g_unall:1;   /* 10G Ethernet compliance */
907 		u8	e10g_lrm:1;
908 		u8	e10g_lr:1;
909 		u8	e10g_sr:1;
910 		u8	ib_sx:1;    /* Infiniband compliance */
911 		u8	ib_lx:1;
912 		u8	ib_cu_a:1;
913 		u8	ib_cu_p:1;
914 #else
915 		u8	ib_cu_p:1;
916 		u8	ib_cu_a:1;
917 		u8	ib_lx:1;
918 		u8	ib_sx:1;    /* Infiniband compliance */
919 		u8	e10g_sr:1;
920 		u8	e10g_lr:1;
921 		u8	e10g_lrm:1;
922 		u8	e10g_unall:1;   /* 10G Ethernet compliance */
923 #endif
924 	} r;
925 };
926 
927 union sfp_xcvr_so1_code_u {
928 	u8		b;
929 	struct {
930 		u8	escon:2;    /* ESCON compliance code */
931 		u8	oc192_reach:1;  /* SONET compliance code */
932 		u8	so_reach:2;
933 		u8	oc48_reach:3;
934 	} r;
935 };
936 
937 union sfp_xcvr_so2_code_u {
938 	u8		b;
939 	struct {
940 		u8	reserved:1;
941 		u8	oc12_reach:3;   /* OC12 reach */
942 		u8	reserved1:1;
943 		u8	oc3_reach:3;    /* OC3 reach */
944 	} r;
945 };
946 
947 union sfp_xcvr_eth_code_u {
948 	u8		b;
949 	struct {
950 		u8	base_px:1;
951 		u8	base_bx10:1;
952 		u8	e100base_fx:1;
953 		u8	e100base_lx:1;
954 		u8	e1000base_t:1;
955 		u8	e1000base_cx:1;
956 		u8	e1000base_lx:1;
957 		u8	e1000base_sx:1;
958 	} r;
959 };
960 
961 struct sfp_xcvr_fc1_code_s {
962 	u8	link_len:5; /* FC link length */
963 	u8	xmtr_tech2:3;
964 	u8	xmtr_tech1:7;   /* FC transmitter technology */
965 	u8	reserved1:1;
966 };
967 
968 union sfp_xcvr_fc2_code_u {
969 	u8		b;
970 	struct {
971 		u8	tw_media:1; /* twin axial pair (tw) */
972 		u8	tp_media:1; /* shielded twisted pair (sp) */
973 		u8	mi_media:1; /* miniature coax (mi) */
974 		u8	tv_media:1; /* video coax (tv) */
975 		u8	m6_media:1; /* multimode, 62.5m (m6) */
976 		u8	m5_media:1; /* multimode, 50m (m5) */
977 		u8	reserved:1;
978 		u8	sm_media:1; /* single mode (sm) */
979 	} r;
980 };
981 
982 union sfp_xcvr_fc3_code_u {
983 	u8		b;
984 	struct {
985 #ifdef __BIG_ENDIAN
986 		u8	rsv4:1;
987 		u8	mb800:1;    /* 800 Mbytes/sec */
988 		u8	mb1600:1;   /* 1600 Mbytes/sec */
989 		u8	mb400:1;    /* 400 Mbytes/sec */
990 		u8	rsv2:1;
991 		u8	mb200:1;    /* 200 Mbytes/sec */
992 		u8	rsv1:1;
993 		u8	mb100:1;    /* 100 Mbytes/sec */
994 #else
995 		u8	mb100:1;    /* 100 Mbytes/sec */
996 		u8	rsv1:1;
997 		u8	mb200:1;    /* 200 Mbytes/sec */
998 		u8	rsv2:1;
999 		u8	mb400:1;    /* 400 Mbytes/sec */
1000 		u8	mb1600:1;   /* 1600 Mbytes/sec */
1001 		u8	mb800:1;    /* 800 Mbytes/sec */
1002 		u8	rsv4:1;
1003 #endif
1004 	} r;
1005 };
1006 
1007 struct sfp_xcvr_s {
1008 	union sfp_xcvr_e10g_code_u	e10g;
1009 	union sfp_xcvr_so1_code_u	so1;
1010 	union sfp_xcvr_so2_code_u	so2;
1011 	union sfp_xcvr_eth_code_u	eth;
1012 	struct sfp_xcvr_fc1_code_s	fc1;
1013 	union sfp_xcvr_fc2_code_u	fc2;
1014 	union sfp_xcvr_fc3_code_u	fc3;
1015 };
1016 
1017 /*
1018  *	Flash module specific
1019  */
1020 #define BFA_FLASH_PART_ENTRY_SIZE	32	/* partition entry size */
1021 #define BFA_FLASH_PART_MAX		32	/* maximal # of partitions */
1022 
1023 enum bfa_flash_part_type {
1024 	BFA_FLASH_PART_OPTROM   = 1,    /* option rom partition */
1025 	BFA_FLASH_PART_FWIMG    = 2,    /* firmware image partition */
1026 	BFA_FLASH_PART_FWCFG    = 3,    /* firmware tuneable config */
1027 	BFA_FLASH_PART_DRV      = 4,    /* IOC driver config */
1028 	BFA_FLASH_PART_BOOT     = 5,    /* boot config */
1029 	BFA_FLASH_PART_ASIC     = 6,    /* asic bootstrap configuration */
1030 	BFA_FLASH_PART_MFG      = 7,    /* manufacturing block partition */
1031 	BFA_FLASH_PART_OPTROM2  = 8,    /* 2nd option rom partition */
1032 	BFA_FLASH_PART_VPD      = 9,    /* vpd data of OEM info */
1033 	BFA_FLASH_PART_PBC      = 10,   /* pre-boot config */
1034 	BFA_FLASH_PART_BOOTOVL  = 11,   /* boot overlay partition */
1035 	BFA_FLASH_PART_LOG      = 12,   /* firmware log partition */
1036 	BFA_FLASH_PART_PXECFG   = 13,   /* pxe boot config partition */
1037 	BFA_FLASH_PART_PXEOVL   = 14,   /* pxe boot overlay partition */
1038 	BFA_FLASH_PART_PORTCFG  = 15,   /* port cfg partition */
1039 	BFA_FLASH_PART_ASICBK   = 16,   /* asic backup partition */
1040 };
1041 
1042 /*
1043  * flash partition attributes
1044  */
1045 struct bfa_flash_part_attr_s {
1046 	u32	part_type;      /* partition type */
1047 	u32	part_instance;  /* partition instance */
1048 	u32	part_off;       /* partition offset */
1049 	u32	part_size;      /* partition size */
1050 	u32	part_len;       /* partition content length */
1051 	u32	part_status;    /* partition status */
1052 	char	rsv[BFA_FLASH_PART_ENTRY_SIZE - 24];
1053 };
1054 
1055 /*
1056  * flash attributes
1057  */
1058 struct bfa_flash_attr_s {
1059 	u32	status; /* flash overall status */
1060 	u32	npart;  /* num of partitions */
1061 	struct bfa_flash_part_attr_s part[BFA_FLASH_PART_MAX];
1062 };
1063 
1064 /*
1065  *	DIAG module specific
1066  */
1067 #define LB_PATTERN_DEFAULT	0xB5B5B5B5
1068 #define QTEST_CNT_DEFAULT	10
1069 #define QTEST_PAT_DEFAULT	LB_PATTERN_DEFAULT
1070 
1071 struct bfa_diag_memtest_s {
1072 	u8	algo;
1073 	u8	rsvd[7];
1074 };
1075 
1076 struct bfa_diag_memtest_result {
1077 	u32	status;
1078 	u32	addr;
1079 	u32	exp; /* expect value read from reg */
1080 	u32	act; /* actually value read */
1081 	u32	err_status;             /* error status reg */
1082 	u32	err_status1;    /* extra error info reg */
1083 	u32	err_addr; /* error address reg */
1084 	u8	algo;
1085 	u8	rsv[3];
1086 };
1087 
1088 struct bfa_diag_loopback_result_s {
1089 	u32	numtxmfrm;      /* no. of transmit frame */
1090 	u32	numosffrm;      /* no. of outstanding frame */
1091 	u32	numrcvfrm;      /* no. of received good frame */
1092 	u32	badfrminf;      /* mis-match info */
1093 	u32	badfrmnum;      /* mis-match fram number */
1094 	u8	status;         /* loopback test result */
1095 	u8	rsvd[3];
1096 };
1097 
1098 struct bfa_diag_ledtest_s {
1099 	u32	cmd;    /* bfa_led_op_t */
1100 	u32	color;  /* bfa_led_color_t */
1101 	u16	freq;   /* no. of blinks every 10 secs */
1102 	u8	led;    /* bitmap of LEDs to be tested */
1103 	u8	rsvd[5];
1104 };
1105 
1106 struct bfa_diag_loopback_s {
1107 	u32	loopcnt;
1108 	u32	pattern;
1109 	u8	lb_mode;    /* bfa_port_opmode_t */
1110 	u8	speed;      /* bfa_port_speed_t */
1111 	u8	rsvd[2];
1112 };
1113 
1114 /*
1115  *	PHY module specific
1116  */
1117 enum bfa_phy_status_e {
1118 	BFA_PHY_STATUS_GOOD	= 0, /* phy is good */
1119 	BFA_PHY_STATUS_NOT_PRESENT	= 1, /* phy does not exist */
1120 	BFA_PHY_STATUS_BAD	= 2, /* phy is bad */
1121 };
1122 
1123 /*
1124  * phy attributes for phy query
1125  */
1126 struct bfa_phy_attr_s {
1127 	u32	status;         /* phy present/absent status */
1128 	u32	length;         /* firmware length */
1129 	u32	fw_ver;         /* firmware version */
1130 	u32	an_status;      /* AN status */
1131 	u32	pma_pmd_status; /* PMA/PMD link status */
1132 	u32	pma_pmd_signal; /* PMA/PMD signal detect */
1133 	u32	pcs_status;     /* PCS link status */
1134 };
1135 
1136 /*
1137  * phy stats
1138  */
1139 struct bfa_phy_stats_s {
1140 	u32	status;         /* phy stats status */
1141 	u32	link_breaks;    /* Num of link breaks after linkup */
1142 	u32	pma_pmd_fault;  /* NPMA/PMD fault */
1143 	u32	pcs_fault;      /* PCS fault */
1144 	u32	speed_neg;      /* Num of speed negotiation */
1145 	u32	tx_eq_training; /* Num of TX EQ training */
1146 	u32	tx_eq_timeout;  /* Num of TX EQ timeout */
1147 	u32	crc_error;      /* Num of CRC errors */
1148 };
1149 
1150 #pragma pack()
1151 
1152 #endif /* __BFA_DEFS_H__ */
1153