Searched refs:ddrcReg_PHY_ADDR_SS_CTRL_ENABLE (Results 1 – 2 of 2) sorted by relevance
70 ddrcReg_PHY_ADDR_SS_CTRL_ENABLE; in chipcHw_enableSpreadSpectrum()82 ddrcReg_PHY_ADDR_CTL_REGP->ssCtl &= ~ddrcReg_PHY_ADDR_SS_CTRL_ENABLE; in chipcHw_disableSpreadSpectrum()
423 #define ddrcReg_PHY_ADDR_SS_CTRL_ENABLE 0x00000001 macro