Searched refs:ddrcReg_PHY_ADDR_CTL_PLL_PRE_DIV_P1_SHIFT (Results 1 – 1 of 1) sorted by relevance
480 #define ddrcReg_PHY_ADDR_CTL_PLL_PRE_DIV_P1_SHIFT 0 macro481 … ddrcReg_PHY_ADDR_CTL_PLL_PRE_DIV_P1_MASK (0xf << ddrcReg_PHY_ADDR_CTL_PLL_PRE_DIV_P1_SHIFT)