Searched refs:ddrcReg_PHY_ADDR_CTL_PLL_DIV_M1_SHIFT (Results 1 – 1 of 1) sorted by relevance
485 #define ddrcReg_PHY_ADDR_CTL_PLL_DIV_M1_SHIFT 24 macro486 …ine ddrcReg_PHY_ADDR_CTL_PLL_DIV_M1_MASK (0xff << ddrcReg_PHY_ADDR_CTL_PLL_DIV_M1_SHIFT)