Searched refs:ddr2 (Results 1 – 11 of 11) sorted by relevance
/linux-3.4.99/arch/cris/arch-v32/mach-a3/ |
D | dram_init.S | 25 ;; Refer to ddr2 MDS for initialization sequence 33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0 34 move.d REG_STATE(ddr2, rw_phy_cfg, en, yes), $r1 43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0 44 move.d REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \ 45 REG_STATE(ddr2, rw_phy_ctrl, cal_rst, yes), $r1 47 move.d REG_STATE(ddr2, rw_phy_ctrl, cal_start, yes), $r1 56 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0 74 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0 79 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0 [all …]
|
D | hw_settings.S | 32 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg) 34 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency) 36 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing)
|
D | cpufreq.c | 141 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg); in cris_sdram_freq_notifier()
|
/linux-3.4.99/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
D | clkgen_defs.h | 101 unsigned int ddr2 : 1; member
|
/linux-3.4.99/arch/cris/include/arch-v32/mach-a3/mach/ |
D | startup.inc | 68 REG_STATE(clkgen, rw_clk_ctrl, ddr2, yes) | \
|
/linux-3.4.99/arch/powerpc/boot/dts/fsl/ |
D | p5020si-post.dtsi | 209 dev-handle = <&ddr2>; 255 ddr2: memory-controller@9000 { label
|
D | p4080si-post.dtsi | 183 dev-handle = <&ddr2>; 260 ddr2: memory-controller@9000 { label
|
/linux-3.4.99/arch/powerpc/boot/dts/ |
D | haleakala.dts | 92 compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
|
D | obs600.dts | 106 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
|
D | makalu.dts | 93 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
|
D | kilauea.dts | 102 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
|