Searched refs:crtc_reg (Results 1 – 9 of 9) sorted by relevance
93 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg; in nv04_dfp_disable()121 fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()136 fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()251 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg; in nv04_dfp_prepare()287 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()288 struct nv04_crtc_reg *savep = &dev_priv->saved_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()462 dev_priv->mode_reg.crtc_reg[head].fp_control = in nv04_dfp_commit()602 (&dev_priv->saved_reg.crtc_reg[head].pllvals); in nv04_dfp_restore()
53 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_digital_vibrance()68 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_image_sharpening()109 struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index]; in nv_crtc_calc_state_ext()230 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_vga()457 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()458 struct nv04_crtc_reg *savep = &dev_priv->saved_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()536 …regp->CRTC[NV_CIO_CRE_TVOUT_LATENCY] = dev_priv->saved_reg.crtc_reg[0].CRTC[NV_CIO_CRE_TVOUT_LATEN… in nv_crtc_mode_set_regs()636 struct nv04_crtc_reg *crtc_state = &state->crtc_reg[nv_crtc->index]; in nv_crtc_save()638 struct nv04_crtc_reg *crtc_saved = &saved->crtc_reg[nv_crtc->index]; in nv_crtc_save()657 uint8_t saved_cr21 = dev_priv->saved_reg.crtc_reg[head].CRTC[NV_CIO_CRE_21]; in nv_crtc_restore()[all …]
98 struct nv04_crtc_reg *state = &dev_priv->mode_reg.crtc_reg[head]; in nv04_tv_bind()138 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; in nv04_tv_mode_set()
653 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ramdac()728 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_ramdac()798 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_vga()822 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_vga()849 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ext()924 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_ext()1039 state->crtc_reg[head].DAC[i] = nv_rd08(dev, in nv_save_state_palette()1058 state->crtc_reg[head].DAC[i]); in nouveau_hw_load_state_palette()
42 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; in nv04_cursor_set_offset()
397 uint8_t *cr_lcd = &dev_priv->mode_reg.crtc_reg[head].CRTC[ in nv17_tv_prepare()458 struct nv04_crtc_reg *regs = &dev_priv->mode_reg.crtc_reg[head]; in nv17_tv_mode_set()
442 &dev_priv->mode_reg.crtc_reg[head].CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX]; in nv_show_cursor()
549 struct nv04_crtc_reg *regs = &dev_priv->mode_reg.crtc_reg[head]; in nv17_ctv_update_rescaler()
690 struct nv04_crtc_reg crtc_reg[2]; member