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Searched refs:core_ck (Results 1 – 4 of 4) sorted by relevance

/linux-3.4.99/arch/arm/mach-omap2/
Dclock.c505 struct clk *hfclkin_ck, *core_ck, *mpu_ck; in omap2_clk_print_new_rates() local
512 core_ck = clk_get(NULL, core_ck_name); in omap2_clk_print_new_rates()
513 if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name)) in omap2_clk_print_new_rates()
526 (clk_get_rate(core_ck) / 1000000), in omap2_clk_print_new_rates()
Dclock2420_data.c191 static struct clk core_ck = { variable
285 { .parent = &core_ck, .rates = common_clkout_src_core_rates },
402 { .parent = &core_ck, .rates = mpu_core_rates },
409 .parent = &core_ck,
440 { .parent = &core_ck, .rates = dsp_fck_core_rates },
447 .parent = &core_ck,
483 .parent = &core_ck,
536 { .parent = &core_ck, .rates = core_l3_core_rates },
543 .parent = &core_ck,
626 { .parent = &core_ck, .rates = ssi_ssr_sst_fck_core_rates },
[all …]
Dclock2430_data.c190 static struct clk core_ck = { variable
305 { .parent = &core_ck, .rates = common_clkout_src_core_rates },
383 { .parent = &core_ck, .rates = mpu_core_rates },
390 .parent = &core_ck,
418 { .parent = &core_ck, .rates = dsp_fck_core_rates },
425 .parent = &core_ck,
481 { .parent = &core_ck, .rates = core_l3_core_rates },
488 .parent = &core_ck,
570 { .parent = &core_ck, .rates = ssi_ssr_sst_fck_core_rates },
577 .parent = &core_ck,
[all …]
Dclock3xxx_data.c506 static struct clk core_ck = { variable
992 { .parent = &core_ck, .rates = clkout2_src_core_rates },
1057 { .parent = &core_ck, .rates = div4_rates },
1068 .parent = &core_ck,
1124 .parent = &core_ck,
1145 { .parent = &core_ck, .rates = div2_rates },
1152 .parent = &core_ck,
1284 { .parent = &core_ck, .rates = sgx_core_rates },
3251 CLK(NULL, "core_ck", &core_ck, CK_3XXX),
3612 (core_ck.rate / 1000000), (arm_fck.rate / 1000000)); in omap3xxx_clk_init()