Searched refs:control0 (Results 1 – 7 of 7) sorted by relevance
68 lli->control0, lli->control1); in show_lli()147 u32 control0, control1; in s3c64xx_dma_fill_lli() local153 control0 = PL080_CONTROL_SRC_AHB2; in s3c64xx_dma_fill_lli()154 control0 |= PL080_CONTROL_DST_INCR; in s3c64xx_dma_fill_lli()160 control0 = PL080_CONTROL_DST_AHB2; in s3c64xx_dma_fill_lli()161 control0 |= PL080_CONTROL_SRC_INCR; in s3c64xx_dma_fill_lli()170 control0 |= PL080_CONTROL_PROT_SYS; /* always in priv. mode */ in s3c64xx_dma_fill_lli()171 control0 |= PL080_CONTROL_TC_IRQ_EN; /* always fire IRQ */ in s3c64xx_dma_fill_lli()172 control0 |= (u32)chan->hw_width << PL080_CONTROL_DWIDTH_SHIFT; in s3c64xx_dma_fill_lli()173 control0 |= (u32)chan->hw_width << PL080_CONTROL_SWIDTH_SHIFT; in s3c64xx_dma_fill_lli()[all …]
133 u32 control0; member140 u32 control0; member
159 uint8_t control0 = sil164_read(client, SIL164_CONTROL0); in sil164_set_power_state() local162 control0 |= SIL164_CONTROL0_POWER_ON; in sil164_set_power_state()164 control0 &= ~SIL164_CONTROL0_POWER_ON; in sil164_set_power_state()166 sil164_write(client, SIL164_CONTROL0, control0); in sil164_set_power_state()
46 unsigned long control0; in vt8500lcd_set_par() local116 control0 = readl(fbi->regbase) & ~0xf; in vt8500lcd_set_par()131 writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase); in vt8500lcd_set_par()
143 __le32 control0; member
220 desc->dma64.control0 = cpu_to_le32(ctl0); in op64_fill_descriptor()
791 u8 control0; /* control0 register(unused) */ member