Searched refs:chipcHw_REG_SPARE1_VPM_PHASE_INTR_ENABLE (Results 1 – 2 of 2) sorted by relevance
1264 pChipcHw->Spare1 &= ~chipcHw_REG_SPARE1_VPM_PHASE_INTR_ENABLE; in chipcHw_vpmPhaseAlignInterruptMode()1266 pChipcHw->Spare1 |= chipcHw_REG_SPARE1_VPM_PHASE_INTR_ENABLE; in chipcHw_vpmPhaseAlignInterruptMode()
469 #define chipcHw_REG_SPARE1_VPM_PHASE_INTR_ENABLE 0x40000000 /* Enable VPM phase align panic … macro