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Searched refs:chipcHw_REG_DDR_PHASE_CTRL_MASK (Results 1 – 2 of 2) sorted by relevance

/linux-3.4.99/arch/arm/mach-bcmring/include/mach/csp/
DchipcHw_reg.h496 #define chipcHw_REG_DDR_PHASE_CTRL_MASK 0x0000003F /* DDR phase control value */ macro
DchipcHw_inline.h1530 PhaseAlignStatus & chipcHw_REG_DDR_PHASE_CTRL_MASK) >> in chipcHw_getDdrPhaseControl()