Searched refs:chipcHw_REG_DDR_HW_PHASE_CTRL_ENABLE (Results 1 – 2 of 2) sorted by relevance
1310 pChipcHw->DDRPhaseCtrl1 |= chipcHw_REG_DDR_HW_PHASE_CTRL_ENABLE; in chipcHw_ddrHwPhaseAlignEnable()1323 pChipcHw->DDRPhaseCtrl1 &= ~chipcHw_REG_DDR_HW_PHASE_CTRL_ENABLE; in chipcHw_ddrHwPhaseAlignDisable()
474 #define chipcHw_REG_DDR_HW_PHASE_CTRL_ENABLE 0x40000000 /* Enable DDR HW phase alignment… macro