Searched refs:checking_wrmsrl (Results 1 – 8 of 8) sorted by relevance
| /linux-3.4.99/arch/x86/kernel/cpu/ |
| D | perf_event_p6.c | 74 (void)checking_wrmsrl(hwc->config_base, val); in p6_pmu_disable_event()
87 (void)checking_wrmsrl(hwc->config_base, val); in p6_pmu_enable_event()
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| D | amd.c | 611 checking_wrmsrl(0xc0011021, val); in init_amd()
625 checking_wrmsrl(0xc0011021, val); in init_amd()
710 checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask); in init_amd()
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| D | perf_event_p4.c | 912 (void)checking_wrmsrl(hwc->config_base, in p4_pmu_disable_event()
946 (void)checking_wrmsrl(MSR_IA32_PEBS_ENABLE, (u64)bind->metric_pebs); in p4_pmu_enable_pebs()
947 (void)checking_wrmsrl(MSR_P4_PEBS_MATRIX_VERT, (u64)bind->metric_vert); in p4_pmu_enable_pebs()
981 (void)checking_wrmsrl(escr_addr, escr_conf); in p4_pmu_enable_event()
982 (void)checking_wrmsrl(hwc->config_base, in p4_pmu_enable_event()
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| D | perf_event_intel.c | 1012 checking_wrmsrl(x86_pmu_config_addr(idx), 0ull); in intel_pmu_reset()
1013 checking_wrmsrl(x86_pmu_event_addr(idx), 0ull); in intel_pmu_reset()
1016 checking_wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull); in intel_pmu_reset()
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| D | perf_event.c | 225 ret = checking_wrmsrl(x86_pmu_event_addr(0), val); in check_hw_exists()
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| /linux-3.4.99/arch/x86/vdso/ |
| D | vdso32-setup.c | 209 checking_wrmsrl(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS); in syscall32_cpu_init()
210 checking_wrmsrl(MSR_IA32_SYSENTER_ESP, 0ULL); in syscall32_cpu_init()
211 checking_wrmsrl(MSR_IA32_SYSENTER_EIP, (u64)ia32_sysenter_target); in syscall32_cpu_init()
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| /linux-3.4.99/arch/x86/kernel/ |
| D | process_64.c | 478 ret = checking_wrmsrl(MSR_KERNEL_GS_BASE, addr); in do_arch_prctl()
506 ret = checking_wrmsrl(MSR_FS_BASE, addr); in do_arch_prctl()
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| /linux-3.4.99/arch/x86/include/asm/ |
| D | msr.h | 259 #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \ macro
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