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Searched refs:cfg_reg (Results 1 – 25 of 27) sorted by relevance

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/linux-3.4.99/drivers/isdn/hisax/
Davm_a1p.c67 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_REG_OFFSET + offset); in ReadISAC()
68 ret = bytein(cs->hw.avm.cfg_reg + DATAREG_OFFSET); in ReadISAC()
76 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_REG_OFFSET + offset); in WriteISAC()
77 byteout(cs->hw.avm.cfg_reg + DATAREG_OFFSET, value); in WriteISAC()
83 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_FIFO_OFFSET); in ReadISACfifo()
84 insb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size); in ReadISACfifo()
90 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_FIFO_OFFSET); in WriteISACfifo()
91 outsb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size); in WriteISACfifo()
100 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, in ReadHSCX()
102 ret = bytein(cs->hw.avm.cfg_reg + DATAREG_OFFSET); in ReadHSCX()
[all …]
Dteles3.c162 if (cs->hw.teles3.cfg_reg) { in release_io_teles3()
164 release_region(cs->hw.teles3.cfg_reg, 1); in release_io_teles3()
166 release_region(cs->hw.teles3.cfg_reg, 8); in release_io_teles3()
179 if ((cs->hw.teles3.cfg_reg) && (cs->typ != ISDN_CTYPE_COMPAQ_ISA)) { in reset_teles3()
209 byteout(cs->hw.teles3.cfg_reg + 4, irqcfg); in reset_teles3()
211 byteout(cs->hw.teles3.cfg_reg + 4, irqcfg | 1); in reset_teles3()
214 byteout(cs->hw.teles3.cfg_reg, 0xff); in reset_teles3()
216 byteout(cs->hw.teles3.cfg_reg, 0x00); in reset_teles3()
331 cs->hw.teles3.cfg_reg = card->para[1]; in setup_teles3()
332 switch (cs->hw.teles3.cfg_reg) { in setup_teles3()
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Ds0box.c98 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset)); in ReadISAC()
104 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset, value); in WriteISAC()
110 read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size); in ReadISACfifo()
116 write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size); in WriteISACfifo()
122 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset)); in ReadHSCX()
128 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset, value); in WriteHSCX()
135 #define READHSCX(cs, nr, reg) readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg)
136 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg, d…
137 #define READHSCXFIFO(cs, nr, ptr, cnt) read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscxfifo[nr],…
138 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscxfifo[nr…
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Davm_a1.c110 while (((sval = bytein(cs->hw.avm.cfg_reg)) & 0xf) != 0x7) { in avm_a1_interrupt()
112 byteout(cs->hw.avm.cfg_reg, 0x1E); in avm_a1_interrupt()
113 sval = bytein(cs->hw.avm.cfg_reg); in avm_a1_interrupt()
140 release_region(cs->hw.avm.cfg_reg, 8); in release_ioregs()
169 byteout(cs->hw.avm.cfg_reg, 0x16); in AVM_card_msg()
170 byteout(cs->hw.avm.cfg_reg, 0x1E); in AVM_card_msg()
192 cs->hw.avm.cfg_reg = card->para[1] + 0x1800; in setup_avm_a1()
200 if (!request_region(cs->hw.avm.cfg_reg, 8, "avm cfg")) { in setup_avm_a1()
203 cs->hw.avm.cfg_reg, in setup_avm_a1()
204 cs->hw.avm.cfg_reg + 8); in setup_avm_a1()
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Dteles0.c187 if (cs->hw.teles0.cfg_reg) in release_io_teles0()
188 release_region(cs->hw.teles0.cfg_reg, 8); in release_io_teles0()
198 if (cs->hw.teles0.cfg_reg) { in reset_teles0()
229 byteout(cs->hw.teles0.cfg_reg + 4, cfval); in reset_teles0()
231 byteout(cs->hw.teles0.cfg_reg + 4, cfval | 1); in reset_teles0()
279 cs->hw.teles0.cfg_reg = card->para[2]; in setup_teles0()
281 cs->hw.teles0.cfg_reg = 0; in setup_teles0()
290 if (cs->hw.teles0.cfg_reg) { in setup_teles0()
291 if (!request_region(cs->hw.teles0.cfg_reg, 8, "teles cfg")) { in setup_teles0()
295 cs->hw.teles0.cfg_reg, in setup_teles0()
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Dsedlbauer.c404 if (cs->hw.sedl.cfg_reg) in release_io_sedlbauer()
405 release_region(cs->hw.sedl.cfg_reg, bytecnt); in release_io_sedlbauer()
427 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_on); in reset_sedlbauer()
429 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off); in reset_sedlbauer()
454 byteout(cs->hw.sedl.cfg_reg + 5, 0); in Sedl_card_msg()
474 byteout(cs->hw.sedl.cfg_reg + 5, 0x02); in Sedl_card_msg()
501 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off); in Sedl_card_msg()
512 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off); in Sedl_card_msg()
568 cs->hw.sedl.cfg_reg = card->para[1]; in setup_sedlbauer_isapnp()
619 cs->hw.sedl.cfg_reg = pci_resource_start(dev_sedl, 0); in setup_sedlbauer_pci()
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Dsportster.c129 bytein(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ + 1); in sportster_interrupt()
139 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, 0); in release_io_sportster()
141 adr = cs->hw.spt.cfg_reg + i * 1024; in release_io_sportster()
150 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq); in reset_sportster()
153 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq); in reset_sportster()
176 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq); in Sportster_card_msg()
192 adr = cs->hw.spt.cfg_reg + i * 1024; in get_io_range()
204 adr = cs->hw.spt.cfg_reg + j * 1024; in get_io_range()
222 cs->hw.spt.cfg_reg = card->para[1]; in setup_sportster()
226 cs->hw.spt.isac = cs->hw.spt.cfg_reg + SPORTSTER_ISAC; in setup_sportster()
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Ddiva.c196 return (memreadreg(cs->hw.diva.cfg_reg, offset + 0x80)); in MemReadISAC_IPAC()
202 memwritereg(cs->hw.diva.cfg_reg, offset | 0x80, value); in MemWriteISAC_IPAC()
209 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0x80); in MemReadISACfifo_IPAC()
216 memwritereg(cs->hw.diva.cfg_reg, 0x80, *data++); in MemWriteISACfifo_IPAC()
222 return (memreadreg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0))); in MemReadHSCX()
228 memwritereg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0), value); in MemWriteHSCX()
235 return (memreadreg(cs->hw.diva.cfg_reg, offset)); in MemReadISAC_IPACX()
241 memwritereg(cs->hw.diva.cfg_reg, offset, value); in MemWriteISAC_IPACX()
248 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0); in MemReadISACfifo_IPACX()
255 memwritereg(cs->hw.diva.cfg_reg, 0, *data++); in MemWriteISACfifo_IPACX()
[all …]
Dsaphir.c176 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, 0xff); in release_io_saphir()
179 if (cs->hw.saphir.cfg_reg) in release_io_saphir()
180 release_region(cs->hw.saphir.cfg_reg, 6); in release_io_saphir()
207 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, irq_val); in saphir_reset()
208 byteout(cs->hw.saphir.cfg_reg + RESET_REG, 1); in saphir_reset()
210 byteout(cs->hw.saphir.cfg_reg + RESET_REG, 0); in saphir_reset()
212 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, irq_val); in saphir_reset()
213 byteout(cs->hw.saphir.cfg_reg + SPARE_REG, 0x02); in saphir_reset()
255 cs->hw.saphir.cfg_reg = card->para[1]; in setup_saphir()
260 if (!request_region(cs->hw.saphir.cfg_reg, 6, "saphir")) { in setup_saphir()
[all …]
Davm_pci.c83 outb(idx, cs->hw.avm.cfg_reg + 4); in ReadISAC()
93 outb(idx, cs->hw.avm.cfg_reg + 4); in WriteISAC()
100 outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4); in ReadISACfifo()
107 outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4); in WriteISACfifo()
117 outl(idx, cs->hw.avm.cfg_reg + 4); in ReadHDLCPCI()
127 outl(idx, cs->hw.avm.cfg_reg + 4); in WriteHDLCPCI()
137 outb(idx, cs->hw.avm.cfg_reg + 4); in ReadHDLCPnP()
147 outb(idx, cs->hw.avm.cfg_reg + 4); in WriteHDLCPnP()
264 outl(idx, cs->hw.avm.cfg_reg + 4); in hdlc_empty_fifo()
274 outb(idx, cs->hw.avm.cfg_reg + 4); in hdlc_empty_fifo()
[all …]
Dasuscom.c245 if (cs->hw.asus.cfg_reg) in release_io_asuscom()
246 release_region(cs->hw.asus.cfg_reg, bytecnt); in release_io_asuscom()
373 cs->hw.asus.cfg_reg = card->para[1]; in setup_asuscom()
375 if (!request_region(cs->hw.asus.cfg_reg, bytecnt, "asuscom isdn")) { in setup_asuscom()
378 cs->hw.asus.cfg_reg, in setup_asuscom()
379 cs->hw.asus.cfg_reg + bytecnt); in setup_asuscom()
383 cs->hw.asus.cfg_reg, cs->irq); in setup_asuscom()
389 val = readreg(cs->hw.asus.cfg_reg + ASUS_IPAC_ALE, in setup_asuscom()
390 cs->hw.asus.cfg_reg + ASUS_IPAC_DATA, IPAC_ID); in setup_asuscom()
393 cs->hw.asus.adr = cs->hw.asus.cfg_reg + ASUS_IPAC_ALE; in setup_asuscom()
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Dmic.c163 if (cs->hw.mic.cfg_reg) in release_io_mic()
164 release_region(cs->hw.mic.cfg_reg, bytecnt); in release_io_mic()
203 cs->hw.mic.cfg_reg = card->para[1]; in setup_mic()
205 cs->hw.mic.adr = cs->hw.mic.cfg_reg + MIC_ADR; in setup_mic()
206 cs->hw.mic.isac = cs->hw.mic.cfg_reg + MIC_ISAC; in setup_mic()
207 cs->hw.mic.hscx = cs->hw.mic.cfg_reg + MIC_HSCX; in setup_mic()
209 if (!request_region(cs->hw.mic.cfg_reg, bytecnt, "mic isdn")) { in setup_mic()
212 cs->hw.mic.cfg_reg, in setup_mic()
213 cs->hw.mic.cfg_reg + bytecnt); in setup_mic()
217 cs->hw.mic.cfg_reg, cs->irq); in setup_mic()
Dniccy.c133 ival = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in niccy_interrupt()
138 outl(ival, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in niccy_interrupt()
178 val = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in release_io_niccy()
180 outl(val, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in release_io_niccy()
181 release_region(cs->hw.niccy.cfg_reg, 0x40); in release_io_niccy()
194 val = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in niccy_reset()
196 outl(val, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); in niccy_reset()
282 cs->hw.niccy.cfg_reg = 0; in setup_niccy()
317 cs->hw.niccy.cfg_reg = pci_resource_start(niccy_dev, 0); in setup_niccy()
318 if (!cs->hw.niccy.cfg_reg) { in setup_niccy()
[all …]
Dix1_micro.c167 if (cs->hw.ix1.cfg_reg) in release_io_ix1micro()
168 release_region(cs->hw.ix1.cfg_reg, 4); in release_io_ix1micro()
179 byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 1); in ix1_reset()
182 byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 0); in ix1_reset()
285 cs->hw.ix1.cfg_reg = card->para[1]; in setup_ix1micro()
287 if (cs->hw.ix1.cfg_reg) { in setup_ix1micro()
288 if (!request_region(cs->hw.ix1.cfg_reg, 4, "ix1micro cfg")) { in setup_ix1micro()
292 cs->hw.ix1.cfg_reg, in setup_ix1micro()
293 cs->hw.ix1.cfg_reg + 4); in setup_ix1micro()
298 cs->irq, cs->hw.ix1.cfg_reg); in setup_ix1micro()
Dgazel.c333 release_region(cs->hw.gazel.cfg_reg, 0x80); in release_io_gazel()
338 release_region(cs->hw.gazel.cfg_reg, 0x80); in release_io_gazel()
350 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg; in reset_gazel()
457 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { in reserve_regions()
466 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { in reserve_regions()
500 cs->hw.gazel.cfg_reg = card->para[1] + 0xC000; in setup_gazelisa()
516 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); in setup_gazelisa()
586 cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe; in setup_gazelpci()
604 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); in setup_gazelpci()
617 cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg); in setup_gazelpci()
Dhisax.h582 unsigned int cfg_reg; member
590 unsigned int cfg_reg; member
596 unsigned int cfg_reg; member
606 unsigned int cfg_reg; member
614 unsigned long cfg_reg; member
628 unsigned int cfg_reg; member
648 unsigned int cfg_reg; member
661 unsigned int cfg_reg; member
668 unsigned int cfg_reg; member
769 unsigned int cfg_reg; member
[all …]
/linux-3.4.99/arch/arm/plat-omap/
Dmux.c43 || !arch_mux_cfg->cfg_reg) { in omap_mux_register()
81 if (!mux_cfg->cfg_reg) in omap_cfg_reg()
84 return mux_cfg->cfg_reg(reg); in omap_cfg_reg()
/linux-3.4.99/arch/sparc/kernel/
Dsbus.c63 unsigned long cfg_reg; in sbus_set_sbus64() local
75 cfg_reg = iommu->write_complete_reg; in sbus_set_sbus64()
78 cfg_reg += 0x20UL; in sbus_set_sbus64()
81 cfg_reg += 0x28UL; in sbus_set_sbus64()
84 cfg_reg += 0x30UL; in sbus_set_sbus64()
87 cfg_reg += 0x38UL; in sbus_set_sbus64()
90 cfg_reg += 0x40UL; in sbus_set_sbus64()
93 cfg_reg += 0x48UL; in sbus_set_sbus64()
96 cfg_reg += 0x50UL; in sbus_set_sbus64()
103 val = upa_readq(cfg_reg); in sbus_set_sbus64()
[all …]
/linux-3.4.99/arch/arm/mach-omap1/
Dmux.c459 arch_mux_cfg.cfg_reg = omap1_cfg_reg; in omap1_mux_init()
465 arch_mux_cfg.cfg_reg = omap1_cfg_reg; in omap1_mux_init()
/linux-3.4.99/arch/arm/plat-spear/include/plat/
Dclock.h139 void __iomem *cfg_reg; member
/linux-3.4.99/drivers/mmc/host/
Datmel-mci.c194 u32 cfg_reg; member
991 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_start_request()
1136 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_set_ios()
1183 host->cfg_reg |= ATMCI_CFG_HSMODE; in atmci_set_ios()
1185 host->cfg_reg &= ~ATMCI_CFG_HSMODE; in atmci_set_ios()
1191 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_set_ios()
1306 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_request_end()
1413 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_detect_change()
/linux-3.4.99/arch/arm/plat-spear/
Dclock.c516 val = readl(config->cfg_reg); in pll_clk_recalc()
561 val = readl(config->cfg_reg) & in pll_clk_set_rate()
577 writel(val, config->cfg_reg); in pll_clk_set_rate()
/linux-3.4.99/arch/arm/plat-omap/include/plat/
Dmux.h438 int (*cfg_reg)(const struct pin_config *cfg); member
/linux-3.4.99/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_ethtool.c1471 int cfg_reg; in bnx2x_get_pauseparam() local
1477 cfg_reg = bp->link_params.req_flow_ctrl[cfg_idx]; in bnx2x_get_pauseparam()
1479 cfg_reg = bp->link_params.req_fc_auto_adv; in bnx2x_get_pauseparam()
1481 epause->rx_pause = ((cfg_reg & BNX2X_FLOW_CTRL_RX) == in bnx2x_get_pauseparam()
1483 epause->tx_pause = ((cfg_reg & BNX2X_FLOW_CTRL_TX) == in bnx2x_get_pauseparam()
/linux-3.4.99/arch/arm/mach-spear6xx/
Dclock.c60 .cfg_reg = PLL1_FRQ,

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