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Searched refs:cc_rb_backend_disable (Results 1 – 6 of 6) sorted by relevance

/linux-3.4.99/drivers/gpu/drm/radeon/
Dr600_cp.c753 u32 cc_rb_backend_disable; in r600_gfx_init() local
876 cc_rb_backend_disable = RADEON_READ(R600_CC_RB_BACKEND_DISABLE) & 0x00ff0000; in r600_gfx_init()
877 cc_rb_backend_disable |= in r600_gfx_init()
888 r600_count_pipe_bits((cc_rb_backend_disable & in r600_gfx_init()
890 (cc_rb_backend_disable >> 16)); in r600_gfx_init()
908 RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); in r600_gfx_init()
1377 u32 cc_rb_backend_disable; in r700_gfx_init() local
1529 cc_rb_backend_disable = RADEON_READ(R600_CC_RB_BACKEND_DISABLE) & 0x00ff0000; in r700_gfx_init()
1530 cc_rb_backend_disable |= in r700_gfx_init()
1545 r600_count_pipe_bits((cc_rb_backend_disable & in r700_gfx_init()
[all …]
Drv770.c559 u32 cc_rb_backend_disable = 0; in rv770_gpu_init() local
718 cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) & 0x00ff0000; in rv770_gpu_init()
719 cc_rb_backend_disable |= in rv770_gpu_init()
734 r600_count_pipe_bits((cc_rb_backend_disable & in rv770_gpu_init()
736 (cc_rb_backend_disable >> 16)); in rv770_gpu_init()
746 WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); in rv770_gpu_init()
749 WREG32(CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable); in rv770_gpu_init()
Dni.c615 u32 cc_rb_backend_disable = 0; in cayman_gpu_init() local
745 cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE); in cayman_gpu_init()
933 WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); in cayman_gpu_init()
934 WREG32(CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable); in cayman_gpu_init()
941 WREG32(GC_USER_RB_BACKEND_DISABLE, cc_rb_backend_disable); in cayman_gpu_init()
942 WREG32(GC_USER_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable); in cayman_gpu_init()
Dsi.c1582 u32 cc_rb_backend_disable = 0; in si_gpu_init() local
1666 cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE); in si_gpu_init()
1821 WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); in si_gpu_init()
1822 WREG32(CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable); in si_gpu_init()
1828 WREG32(GC_USER_RB_BACKEND_DISABLE, cc_rb_backend_disable); in si_gpu_init()
1829 WREG32(GC_USER_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable); in si_gpu_init()
Dr600.c1510 u32 cc_rb_backend_disable; in r600_gpu_init() local
1639 cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) & 0x00ff0000; in r600_gpu_init()
1640 cc_rb_backend_disable |= in r600_gpu_init()
1651 r600_count_pipe_bits((cc_rb_backend_disable & in r600_gpu_init()
1653 (cc_rb_backend_disable >> 16)); in r600_gpu_init()
1662 WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); in r600_gpu_init()
Devergreen.c1744 u32 cc_rb_backend_disable = 0; in evergreen_gpu_init() local
2009 cc_rb_backend_disable = in evergreen_gpu_init()
2205 u32 rb = cc_rb_backend_disable | (0xf0 << 16); in evergreen_gpu_init()