Searched refs:cacheline_size (Results 1 – 9 of 9) sorted by relevance
| /linux-3.4.99/arch/sparc/include/asm/ |
| D | pci_64.h | 44 unsigned long cacheline_size; in pci_dma_burst_advice() local
49 cacheline_size = 1024; in pci_dma_burst_advice()
51 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
54 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
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| /linux-3.4.99/arch/ia64/include/asm/ |
| D | pci.h | 66 unsigned long cacheline_size; in pci_dma_burst_advice() local
71 cacheline_size = 1024; in pci_dma_burst_advice()
73 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
76 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
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| /linux-3.4.99/arch/alpha/include/asm/ |
| D | pci.h | 83 unsigned long cacheline_size; in pci_dma_burst_advice() local
88 cacheline_size = 1024; in pci_dma_burst_advice()
90 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
93 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
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| /linux-3.4.99/arch/parisc/include/asm/ |
| D | pci.h | 204 unsigned long cacheline_size; in pci_dma_burst_advice() local
209 cacheline_size = 1024; in pci_dma_burst_advice()
211 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
214 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
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| /linux-3.4.99/arch/sh/include/asm/ |
| D | pci.h | 99 unsigned long cacheline_size; in pci_dma_burst_advice() local
105 cacheline_size = L1_CACHE_BYTES; in pci_dma_burst_advice()
107 cacheline_size = byte << 2; in pci_dma_burst_advice()
110 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
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| /linux-3.4.99/arch/powerpc/include/asm/ |
| D | pci.h | 84 unsigned long cacheline_size; in pci_dma_burst_advice() local
89 cacheline_size = 1024; in pci_dma_burst_advice()
91 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
94 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
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| /linux-3.4.99/drivers/pci/ |
| D | pci.c | 2724 u8 cacheline_size; in pci_set_cacheline_size() local
2731 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
2732 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size()
2733 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size()
2739 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
2740 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
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| /linux-3.4.99/drivers/gpu/drm/i915/ |
| D | intel_display.c | 3595 unsigned long cacheline_size; member
3770 entries_required = DIV_ROUND_UP(entries_required, wm->cacheline_size); in intel_calculate_wm()
4059 tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8; in g4x_compute_wm0()
4062 entries = DIV_ROUND_UP(entries, display->cacheline_size); in g4x_compute_wm0()
4071 tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8; in g4x_compute_wm0()
4074 entries = DIV_ROUND_UP(entries, cursor->cacheline_size); in g4x_compute_wm0()
4150 entries = DIV_ROUND_UP(min(small, large), display->cacheline_size); in g4x_compute_srwm()
4155 entries = DIV_ROUND_UP(entries, cursor->cacheline_size); in g4x_compute_srwm()
4251 i965_cursor_wm_info.cacheline_size); in i965_update_wm()
4353 entries = DIV_ROUND_UP(entries, wm_info->cacheline_size); in i9xx_update_wm()
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| /linux-3.4.99/drivers/net/ethernet/broadcom/ |
| D | tg3.c | 14998 int cacheline_size; in tg3_calc_dma_bndry() local
15004 cacheline_size = 1024; in tg3_calc_dma_bndry()
15006 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry()
15046 switch (cacheline_size) { in tg3_calc_dma_bndry()
15071 switch (cacheline_size) { in tg3_calc_dma_bndry()
15088 switch (cacheline_size) { in tg3_calc_dma_bndry()
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