/linux-3.4.99/drivers/staging/tidspbridge/hw/ |
D | MMURegAcM.h | 27 #define MMUMMU_SYSCONFIG_READ_REGISTER32(base_address)\ argument 29 __raw_readl((base_address)+MMU_MMU_SYSCONFIG_OFFSET)) 31 #define MMUMMU_SYSCONFIG_IDLE_MODE_WRITE32(base_address, value)\ argument 34 register u32 data = __raw_readl((base_address)+offset);\ 41 __raw_writel(new_value, base_address+offset);\ 44 #define MMUMMU_SYSCONFIG_AUTO_IDLE_WRITE32(base_address, value)\ argument 47 register u32 data = __raw_readl((base_address)+offset);\ 54 __raw_writel(new_value, base_address+offset);\ 57 #define MMUMMU_IRQSTATUS_READ_REGISTER32(base_address)\ argument 59 __raw_readl((base_address)+MMU_MMU_IRQSTATUS_OFFSET)) [all …]
|
D | hw_mmu.c | 73 static hw_status mmu_flush_entry(const void __iomem *base_address); 115 static hw_status mmu_set_cam_entry(const void __iomem *base_address, 160 static hw_status mmu_set_ram_entry(const void __iomem *base_address, 168 hw_status hw_mmu_enable(const void __iomem *base_address) in hw_mmu_enable() argument 172 MMUMMU_CNTLMMU_ENABLE_WRITE32(base_address, HW_SET); in hw_mmu_enable() 177 hw_status hw_mmu_disable(const void __iomem *base_address) in hw_mmu_disable() argument 181 MMUMMU_CNTLMMU_ENABLE_WRITE32(base_address, HW_CLEAR); in hw_mmu_disable() 186 hw_status hw_mmu_num_locked_set(const void __iomem *base_address, in hw_mmu_num_locked_set() argument 191 MMUMMU_LOCK_BASE_VALUE_WRITE32(base_address, num_locked_entries); in hw_mmu_num_locked_set() 196 hw_status hw_mmu_victim_num_set(const void __iomem *base_address, in hw_mmu_victim_num_set() argument [all …]
|
D | hw_mmu.h | 45 extern hw_status hw_mmu_enable(const void __iomem *base_address); 47 extern hw_status hw_mmu_disable(const void __iomem *base_address); 49 extern hw_status hw_mmu_num_locked_set(const void __iomem *base_address, 52 extern hw_status hw_mmu_victim_num_set(const void __iomem *base_address, 56 extern hw_status hw_mmu_event_ack(const void __iomem *base_address, 59 extern hw_status hw_mmu_event_disable(const void __iomem *base_address, 62 extern hw_status hw_mmu_event_enable(const void __iomem *base_address, 65 extern hw_status hw_mmu_event_status(const void __iomem *base_address, 68 extern hw_status hw_mmu_fault_addr_read(const void __iomem *base_address, 72 extern hw_status hw_mmu_ttb_set(const void __iomem *base_address, [all …]
|
/linux-3.4.99/drivers/misc/ibmasm/ |
D | lowlevel.h | 55 static inline int sp_interrupt_pending(void __iomem *base_address) in sp_interrupt_pending() argument 57 return SP_INTR_MASK & readl(base_address + INTR_STATUS_REGISTER); in sp_interrupt_pending() 60 static inline int uart_interrupt_pending(void __iomem *base_address) in uart_interrupt_pending() argument 62 return UART_INTR_MASK & readl(base_address + INTR_STATUS_REGISTER); in uart_interrupt_pending() 65 static inline void ibmasm_enable_interrupts(void __iomem *base_address, int mask) in ibmasm_enable_interrupts() argument 67 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_enable_interrupts() 71 static inline void ibmasm_disable_interrupts(void __iomem *base_address, int mask) in ibmasm_disable_interrupts() argument 73 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_disable_interrupts() 77 static inline void enable_sp_interrupts(void __iomem *base_address) in enable_sp_interrupts() argument 79 ibmasm_enable_interrupts(base_address, SP_INTR_MASK); in enable_sp_interrupts() [all …]
|
D | lowlevel.c | 40 mfa = get_mfa_inbound(sp->base_address); in ibmasm_send_i2o_message() 47 message = get_i2o_message(sp->base_address, mfa); in ibmasm_send_i2o_message() 52 set_mfa_inbound(sp->base_address, mfa); in ibmasm_send_i2o_message() 61 void __iomem *base_address = sp->base_address; in ibmasm_interrupt_handler() local 64 if (!sp_interrupt_pending(base_address)) in ibmasm_interrupt_handler() 74 mfa = get_mfa_outbound(base_address); in ibmasm_interrupt_handler() 76 struct i2o_message *msg = get_i2o_message(base_address, mfa); in ibmasm_interrupt_handler() 81 set_mfa_outbound(base_address, mfa); in ibmasm_interrupt_handler()
|
D | module.c | 108 sp->base_address = pci_ioremap_bar(pdev, 0); in ibmasm_init_one() 109 if (!sp->base_address) { in ibmasm_init_one() 121 enable_sp_interrupts(sp->base_address); in ibmasm_init_one() 146 disable_sp_interrupts(sp->base_address); in ibmasm_init_one() 150 iounmap(sp->base_address); in ibmasm_init_one() 178 disable_sp_interrupts(sp->base_address); in ibmasm_remove_one() 183 iounmap(sp->base_address); in ibmasm_remove_one()
|
D | uart.c | 39 iomem_base = sp->base_address + SCOUT_COM_B_BASE; in ibmasm_register_uart() 62 enable_uart_interrupts(sp->base_address); in ibmasm_register_uart() 70 disable_uart_interrupts(sp->base_address); in ibmasm_unregister_uart()
|
/linux-3.4.99/drivers/char/xilinx_hwicap/ |
D | buffer_icap.c | 90 return in_be32(drvdata->base_address + XHI_STATUS_REG_OFFSET); in buffer_icap_get_status() 101 static inline u32 buffer_icap_get_bram(void __iomem *base_address, in buffer_icap_get_bram() argument 104 return in_be32(base_address + (offset << 2)); in buffer_icap_get_bram() 115 static inline bool buffer_icap_busy(void __iomem *base_address) in buffer_icap_busy() argument 117 u32 status = in_be32(base_address + XHI_STATUS_REG_OFFSET); in buffer_icap_busy() 129 static inline void buffer_icap_set_size(void __iomem *base_address, in buffer_icap_set_size() argument 132 out_be32(base_address + XHI_SIZE_REG_OFFSET, data); in buffer_icap_set_size() 143 static inline void buffer_icap_set_offset(void __iomem *base_address, in buffer_icap_set_offset() argument 146 out_be32(base_address + XHI_BRAM_OFFSET_REG_OFFSET, data); in buffer_icap_set_offset() 159 static inline void buffer_icap_set_rnc(void __iomem *base_address, in buffer_icap_set_rnc() argument [all …]
|
D | fifo_icap.c | 97 out_be32(drvdata->base_address + XHI_WF_OFFSET, data); in fifo_icap_fifo_write() 108 u32 data = in_be32(drvdata->base_address + XHI_RF_OFFSET); in fifo_icap_fifo_read() 121 out_be32(drvdata->base_address + XHI_SZ_OFFSET, data); in fifo_icap_set_read_size() 130 out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_WRITE_MASK); in fifo_icap_start_config() 140 out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_READ_MASK); in fifo_icap_start_readback() 162 u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET); in fifo_icap_get_status() 173 u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET); in fifo_icap_busy() 186 return in_be32(drvdata->base_address + XHI_WFV_OFFSET); in fifo_icap_write_fifo_vacancy() 198 return in_be32(drvdata->base_address + XHI_RFO_OFFSET); in fifo_icap_read_fifo_occupancy() 364 reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); in fifo_icap_reset() [all …]
|
D | xilinx_hwicap.c | 635 drvdata->base_address = ioremap(drvdata->mem_start, drvdata->mem_size); in hwicap_setup() 636 if (!drvdata->base_address) { in hwicap_setup() 649 drvdata->base_address, in hwicap_setup() 664 iounmap(drvdata->base_address); in hwicap_setup() 705 iounmap(drvdata->base_address); in hwicap_remove()
|
/linux-3.4.99/drivers/staging/comedi/drivers/ |
D | 8253.h | 238 static inline int i8254_load(unsigned long base_address, unsigned int regshift, in i8254_load() argument 256 outb(byte, base_address + (i8254_control_reg << regshift)); in i8254_load() 258 outb(byte, base_address + (counter_number << regshift)); in i8254_load() 260 outb(byte, base_address + (counter_number << regshift)); in i8254_load() 265 static inline int i8254_mm_load(void *base_address, unsigned int regshift, in i8254_mm_load() argument 283 writeb(byte, base_address + (i8254_control_reg << regshift)); in i8254_mm_load() 285 writeb(byte, base_address + (counter_number << regshift)); in i8254_mm_load() 287 writeb(byte, base_address + (counter_number << regshift)); in i8254_mm_load() 293 static inline int i8254_read(unsigned long base_address, unsigned int regshift, in i8254_read() argument 304 outb(byte, base_address + (i8254_control_reg << regshift)); in i8254_read() [all …]
|
/linux-3.4.99/drivers/input/serio/ |
D | xilinx_ps2.c | 74 void __iomem *base_address; /* virt. address of control registers */ member 97 sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET); in xps2_recv() 99 *byte = in_be32(drvdata->base_address + XPS2_RX_DATA_OFFSET); in xps2_recv() 117 intr_sr = in_be32(drvdata->base_address + XPS2_IPISR_OFFSET); in xps2_interrupt() 118 out_be32(drvdata->base_address + XPS2_IPISR_OFFSET, intr_sr); in xps2_interrupt() 170 sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET); in sxps2_write() 172 out_be32(drvdata->base_address + XPS2_TX_DATA_OFFSET, c); in sxps2_write() 202 out_be32(drvdata->base_address + XPS2_GIER_OFFSET, XPS2_GIER_GIE_MASK); in sxps2_open() 203 out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, XPS2_IPIXR_RX_ALL); in sxps2_open() 220 out_be32(drvdata->base_address + XPS2_GIER_OFFSET, 0x00); in sxps2_close() [all …]
|
/linux-3.4.99/arch/x86/math-emu/ |
D | get_address.c | 140 unsigned long base_address, limit, address, seg_top; in pm_address() local 162 base_address = SEG_BASE_ADDR(descriptor); in pm_address() 163 address = base_address + offset; in pm_address() 164 limit = base_address in pm_address() 166 if (limit < base_address) in pm_address() 173 seg_top = base_address + (1 << 20); in pm_address() 174 if (seg_top < base_address) in pm_address() 182 (address > limit) || (address < base_address) ? 0 : in pm_address()
|
/linux-3.4.99/arch/mips/pci/ |
D | pci-vr41xx.c | 64 .base_address = PCI_MAILBOX_BASE_ADDRESS, 68 .base_address = PCI_TARGET_WINDOW1_BASE_ADDRESS, 239 val = MBADD(mailbox->base_address) | TYPE_32BITSPACE | in vr41xx_pciu_init() 246 val = PMBA(window->base_address) | TYPE_32BITSPACE | in vr41xx_pciu_init() 253 val = PMBA(window->base_address) | TYPE_32BITSPACE | in vr41xx_pciu_init()
|
/linux-3.4.99/arch/mips/include/asm/vr41xx/ |
D | pci.h | 42 uint32_t base_address; member 46 uint32_t base_address; member
|
/linux-3.4.99/drivers/staging/iio/adc/ |
D | ad7606.h | 73 void __iomem *base_address; member 91 void __iomem *base_address, unsigned id,
|
D | ad7606_par.c | 25 insw((unsigned long) st->base_address, buf, count); in ad7606_par16_read_block() 41 insb((unsigned long) st->base_address, buf, count * 2); in ad7606_par8_read_block() 111 iounmap(st->base_address); in ad7606_par_remove()
|
/linux-3.4.99/include/linux/ |
D | of_address.h | 14 u64 base_address); 38 u64 base_address) in of_find_matching_node_by_address() argument
|
/linux-3.4.99/drivers/watchdog/ |
D | iTCO_wdt.c | 793 u32 base_address; in iTCO_wdt_init() local 802 pci_read_config_dword(pdev, 0x40, &base_address); in iTCO_wdt_init() 803 base_address &= 0x0000ff80; in iTCO_wdt_init() 804 if (base_address == 0x00000000) { in iTCO_wdt_init() 811 iTCO_wdt_private.ACPIBASE = base_address; in iTCO_wdt_init() 819 pci_read_config_dword(pdev, 0xf0, &base_address); in iTCO_wdt_init() 820 if ((base_address & 1) == 0) { in iTCO_wdt_init() 825 RCBA = base_address & 0xffffc000; in iTCO_wdt_init()
|
/linux-3.4.99/drivers/dma/ |
D | iovlock.c | 92 page_list->base_address = iov[i].iov_base; in dma_pin_iovec_pages() 175 - ((unsigned long)page_list->base_address & PAGE_MASK)) >> PAGE_SHIFT; in dma_memcpy_to_iovec() 244 - ((unsigned long)page_list->base_address & PAGE_MASK)) >> PAGE_SHIFT; in dma_memcpy_pg_to_iovec()
|
/linux-3.4.99/virt/kvm/ |
D | ioapic.c | 279 return ((addr >= ioapic->base_address && in ioapic_in_range() 280 (addr < ioapic->base_address + IOAPIC_MEM_LENGTH))); in ioapic_in_range() 383 ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS; in kvm_ioapic_reset() 409 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address, in kvm_ioapic_init()
|
D | ioapic.h | 38 u64 base_address; member
|
/linux-3.4.99/arch/x86/kvm/ |
D | lapic.c | 655 addr >= apic->base_address && in apic_mmio_in_range() 656 addr < apic->base_address + LAPIC_MMIO_LENGTH; in apic_mmio_in_range() 663 u32 offset = address - apic->base_address; in apic_mmio_read() 908 unsigned int offset = address - apic->base_address; in apic_mmio_write() 1032 apic->base_address = apic->vcpu->arch.apic_base & in kvm_lapic_set_base() 1037 "0x%lx.\n", apic->vcpu->arch.apic_base, apic->base_address); in kvm_lapic_set_base() 1089 vcpu->arch.apic_base, apic->base_address); in kvm_lapic_reset() 1184 apic->base_address = APIC_DEFAULT_PHYS_BASE; in kvm_create_lapic() 1254 apic->base_address = vcpu->arch.apic_base & in kvm_apic_post_state_restore()
|
/linux-3.4.99/include/acpi/ |
D | actbl1.h | 790 u64 base_address; member 799 u64 base_address; member 930 u64 base_address; member
|
/linux-3.4.99/arch/sh/kernel/ |
D | traps_64.c | 350 __u64 base_address, addr; in generate_and_check_address() local 354 base_address = regs->regs[basereg]; in generate_and_check_address() 359 addr = (__u64)((__s64)base_address + (displacement << width_shift)); in generate_and_check_address() 365 addr = base_address + offset; in generate_and_check_address()
|