Searched refs:WRITE_BYTE (Results 1 – 7 of 7) sorted by relevance
/linux-3.4.99/drivers/isdn/hardware/eicon/ |
D | s_pri.c | 93 WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2); in reset_pri_hardware() 95 WRITE_BYTE(p, 0x00); in reset_pri_hardware() 122 WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2); in stop_pri_hardware()
|
D | os_pri.c | 425 WRITE_BYTE(mem++, *data++); in diva_pri_write_sdram_block() 779 WRITE_BYTE(&config[0xc3c], c); /* Base Address enable register */ in pri_get_serial_number() 781 WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0x00); in pri_get_serial_number() 782 WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF); in pri_get_serial_number() 795 WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0xFC); /* Disable FLASH EPROM access */ in pri_get_serial_number() 796 WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF); in pri_get_serial_number() 979 WRITE_BYTE(p, _MP_RISC_RESET | _MP_DSP_RESET); in diva_pri_detect_dsps() 1006 WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2); in diva_pri_detect_dsps()
|
D | s_4bri.c | 169 WRITE_BYTE(&p[PLX9054_INTCSR], 0x00); /* disable PCI interrupts */ in stop_qBri_hardware() 423 WRITE_BYTE(&p[PLX9054_INTCSR], 0x00); /* disable PCI interrupts */ in disable_qBri_interrupt()
|
D | os_4bri.c | 427 WRITE_BYTE(&p[PLX9054_INTCSR], 0x00); /* disable PCI interrupts */ in diva_4bri_init_card() 925 WRITE_BYTE(mem++, *data++); in diva_4bri_write_sdram_block() 1022 WRITE_BYTE(&p[PLX9054_INTCSR], PLX9054_INT_ENABLE); in check_qBri_interrupt() 1050 WRITE_BYTE(&p[PLX9054_INTCSR], PLX9054_INT_ENABLE); in check_qBri_interrupt()
|
D | platform.h | 322 #define WRITE_BYTE(addr, v) writeb(v, addr) macro
|
D | io.c | 629 WRITE_BYTE(Base + (unsigned long)addr, data); in mem_out() 658 WRITE_BYTE(Base + (unsigned long)addr, x + 1); in mem_inc()
|
/linux-3.4.99/drivers/video/ |
D | stifb.c | 159 # define WRITE_BYTE(value,fb,reg) gsc_writeb((value),(fb)->info.fix.mmio_start + (reg)) macro 165 # define WRITE_BYTE(value,fb,reg) do { if (debug_on) \ macro 229 WRITE_BYTE(1, fb, REG_16b1); in SETUP_FB()
|