Searched refs:VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_DIV (Results 1 – 2 of 2) sorted by relevance
4544 val64 |= VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_DIV(0); in __vxge_hw_vpath_tim_configure()
4245 #define VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_DIV(val) vxge_vBIT(val, 35, 5) macro