Searched refs:VIDC_CTRL_DIV1_5 (Results 1 – 2 of 2) sorted by relevance
124 #define VIDC_CTRL_DIV1_5 (2 << 0) macro
138 { 61875, 63125, VIDC_CTRL_DIV1_5, VID_CTL_24MHz }, /* 16.000MHz */