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Searched refs:VGA_WR08 (Results 1 – 8 of 8) sorted by relevance

/linux-3.4.99/drivers/video/nvidia/
Dnv_setup.c62 VGA_WR08(par->PCIO, par->IOBase + 0x04, index); in NVWriteCrtc()
63 VGA_WR08(par->PCIO, par->IOBase + 0x05, value); in NVWriteCrtc()
67 VGA_WR08(par->PCIO, par->IOBase + 0x04, index); in NVReadCrtc()
72 VGA_WR08(par->PVIO, VGA_GFX_I, index); in NVWriteGr()
73 VGA_WR08(par->PVIO, VGA_GFX_D, value); in NVWriteGr()
77 VGA_WR08(par->PVIO, VGA_GFX_I, index); in NVReadGr()
82 VGA_WR08(par->PVIO, VGA_SEQ_I, index); in NVWriteSeq()
83 VGA_WR08(par->PVIO, VGA_SEQ_D, value); in NVWriteSeq()
87 VGA_WR08(par->PVIO, VGA_SEQ_I, index); in NVReadSeq()
99 VGA_WR08(par->PCIO, VGA_ATT_IW, index); in NVWriteAttr()
[all …]
Dnv_hw.c61 VGA_WR08(par->PCIO, 0x3D4, 0x1F); in NVLockUnlock()
62 VGA_WR08(par->PCIO, 0x3D5, Lock ? 0x99 : 0x57); in NVLockUnlock()
64 VGA_WR08(par->PCIO, 0x3D4, 0x11); in NVLockUnlock()
70 VGA_WR08(par->PCIO, 0x3D5, cr11); in NVLockUnlock()
79 VGA_WR08(par->PCIO, 0x3D4, 0x31); in NVShowHideCursor()
80 VGA_WR08(par->PCIO, 0x3D5, par->CurrentState->cursor1); in NVShowHideCursor()
1543 VGA_WR08(par->PCIO, 0x03D4, 0x53); in NVLoadStateExt()
1544 VGA_WR08(par->PCIO, 0x03D5, state->timingH); in NVLoadStateExt()
1545 VGA_WR08(par->PCIO, 0x03D4, 0x54); in NVLoadStateExt()
1546 VGA_WR08(par->PCIO, 0x03D5, state->timingV); in NVLoadStateExt()
[all …]
Dnv_local.h70 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i))) macro
Dnvidia.c449 VGA_WR08(par->PCIO, 0x03D4, 0x1C); in nvidia_calc_regs()
647 VGA_WR08(par->PCIO, 0x03D4, 0x44); in nvidiafb_set_par()
648 VGA_WR08(par->PCIO, 0x03D5, par->ModeReg.crtcOwner); in nvidiafb_set_par()
662 VGA_WR08(par->PCIO, 0x3d4, 0x46); in nvidiafb_set_par()
665 VGA_WR08(par->PCIO, 0x3d5, tmp); in nvidiafb_set_par()
/linux-3.4.99/drivers/video/riva/
Drivafb-i2c.c33 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
41 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
42 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); in riva_gpio_setscl()
51 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda()
59 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda()
60 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); in riva_gpio_setsda()
69 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); in riva_gpio_getscl()
82 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); in riva_gpio_getsda()
Driva_hw.c92 VGA_WR08(chip->PCIO, 0x3D4, 0x11); in vgaLockUnlock()
96 VGA_WR08(chip->PCIO, 0x3D5, cr11); in vgaLockUnlock()
104 VGA_WR08(chip->PVIO, 0x3C4, 0x06); in nv3LockUnlock()
105 VGA_WR08(chip->PVIO, 0x3C5, Lock ? 0x99 : 0x57); in nv3LockUnlock()
114 VGA_WR08(chip->PCIO, 0x3D4, 0x1F); in nv4LockUnlock()
115 VGA_WR08(chip->PCIO, 0x3D5, Lock ? 0x99 : 0x57); in nv4LockUnlock()
129 VGA_WR08(chip->PCIO, 0x3D4, 0x31); in ShowHideCursor()
130 VGA_WR08(chip->PCIO, 0x3D5, chip->CurrentState->cursor1); in ShowHideCursor()
1506 VGA_WR08(chip->PCIO, 0x03D4, 0x44); in LoadStateExt()
1507 VGA_WR08(chip->PCIO, 0x03D5, state->crtcOwner); in LoadStateExt()
[all …]
Dfbdev.c406 VGA_WR08(par->riva.PCIO, 0x3d4, index); in CRTCout()
407 VGA_WR08(par->riva.PCIO, 0x3d5, val); in CRTCout()
413 VGA_WR08(par->riva.PCIO, 0x3d4, index); in CRTCin()
420 VGA_WR08(par->riva.PVIO, 0x3ce, index); in GRAout()
421 VGA_WR08(par->riva.PVIO, 0x3cf, val); in GRAout()
427 VGA_WR08(par->riva.PVIO, 0x3ce, index); in GRAin()
434 VGA_WR08(par->riva.PVIO, 0x3c4, index); in SEQout()
435 VGA_WR08(par->riva.PVIO, 0x3c5, val); in SEQout()
441 VGA_WR08(par->riva.PVIO, 0x3c4, index); in SEQin()
448 VGA_WR08(par->riva.PCIO, 0x3c0, index); in ATTRout()
[all …]
Driva_hw.h85 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i))) macro