Searched refs:VCLK_SRC_SEL_PPLLCLK (Results 1 – 2 of 2) sorted by relevance
923 #define VCLK_SRC_SEL_PPLLCLK 0x03 macro
1334 OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_PPLLCLK, ~VCLK_SRC_SEL_MASK); in radeon_write_pll_regs()