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Searched refs:VADDR (Results 1 – 4 of 4) sorted by relevance

/linux-3.4.99/arch/sparc/include/asm/
Dtsb.h140 #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL) \ argument
143 sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
148 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
154 sllx VADDR, 64 - PMD_SHIFT, REG2; \
167 #define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL) \ argument
168 sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
173 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
179 sllx VADDR, 64 - PMD_SHIFT, REG2; \
190 #define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \ argument
198 cmp REG2, VADDR; \
[all …]
Dpgtsrmmu.h146 #define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srm… argument
148 #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) argument
/linux-3.4.99/arch/sparc/kernel/
Dsun4v_tlb_miss.S10 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \ argument
11 ldx [BASE + HV_FAULT_I_ADDR_OFFSET], VADDR; \
15 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \ argument
16 ldx [BASE + HV_FAULT_D_ADDR_OFFSET], VADDR; \
23 #define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \ argument
24 srlx VADDR, 22, DEST; \
35 #define COMPUTE_TSB_PTR(TSB_PTR, VADDR, HASH_SHIFT, TMP1, TMP2) \ argument
40 srlx VADDR, HASH_SHIFT, TMP1; \
Dtrampoline_64.S161 stx %g2, [%sp + 2047 + 128 + 0x28] ! VADDR
194 stx %g2, [%sp + 2047 + 128 + 0x28] ! VADDR