Searched refs:SPRN_L1CSR1 (Results 1 – 5 of 5) sorted by relevance
21 mfspr r0, SPRN_L1CSR126 mtspr SPRN_L1CSR1, r0 /* Enable I-Cache */
476 mtspr(SPRN_L1CSR1, mfspr(SPRN_L1CSR1) | L1CSR1_ICFI); in machine_check_e500mc()477 while (mfspr(SPRN_L1CSR1) & L1CSR1_ICFI) in machine_check_e500mc()
307 mfspr r3,SPRN_L1CSR1309 mtspr SPRN_L1CSR1,r3
113 case SPRN_L1CSR1: in kvmppc_core_emulate_mtspr()183 case SPRN_L1CSR1: in kvmppc_core_emulate_mfspr()
144 #define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ macro