Searched refs:SMEMC_VIRT (Results 1 – 5 of 5) sorted by relevance
16 #define SMEMC_VIRT IOMEM(0xf6000000) macro18 #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */19 #define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */20 #define MSC0 (SMEMC_VIRT + 0x08) /* Static Memory Control Register 0 */21 #define MSC1 (SMEMC_VIRT + 0x0C) /* Static Memory Control Register 1 */22 #define MSC2 (SMEMC_VIRT + 0x10) /* Static Memory Control Register 2 */23 #define MECR (SMEMC_VIRT + 0x14) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */24 #define SXLCR (SMEMC_VIRT + 0x18) /* LCR value to be written to SDRAM-Timing Synchronous Flash */25 #define SXCNFG (SMEMC_VIRT + 0x1C) /* Synchronous Static Memory Control Register */26 #define SXMRS (SMEMC_VIRT + 0x24) /* MRS value to be written to Synchronous Flash or SMROM */[all …]
31 #define SMEMC_VIRT IOMEM(0xf6000000) macro
327 .virtual = (unsigned long)SMEMC_VIRT,
399 .virtual = (unsigned long)SMEMC_VIRT,
394 .virtual = (unsigned long)SMEMC_VIRT,