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Searched refs:SIC_IWR1 (Results 1 – 17 of 17) sorted by relevance

/linux-3.4.99/arch/blackfin/mach-bf561/include/mach/
Dpll.h27 bfin_write32(SIC_IWR1 + SICA_SICB_OFF, iwr1); in bfin_iwr_restore()
38 *iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF); in bfin_iwr_save()
DdefBF561.h46 #define SIC_IWR1 0xFFC00120 /* SIC Interrupt Wakeup-Enable register 1 */ macro
DcdefBF561.h58 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
59 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1,val)
/linux-3.4.99/arch/blackfin/include/mach-common/
Dpll.h23 # ifdef SIC_IWR1 in bfin_iwr_restore()
42 # ifdef SIC_IWR1 in bfin_iwr_save()
/linux-3.4.99/arch/blackfin/mach-common/
Dclocks-init.c46 # ifdef SIC_IWR1 in init_clocks()
Ddpmc_modes.S254 [P0 + (SIC_IWR1 - SYSMMR_BASE)] = R1;
422 #ifdef SIC_IWR1
423 PM_SYS_PUSH(2, SIC_IWR1)
800 #ifdef SIC_IWR1
801 PM_SYS_POP(2, SIC_IWR1)
Dpm.c38 # ifdef SIC_IWR1 in bfin_pm_suspend_standby_enter()
Dints-priority.c1089 # ifdef SIC_IWR1 in init_arch_irq()
/linux-3.4.99/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h42 #define SIC_IWR1 0xFFC00164 /* Interrupt Wakeup register */ macro
DcdefBF512.h69 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
70 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
/linux-3.4.99/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h45 #define SIC_IWR1 0xFFC00164 /* Interrupt Wakeup register */ macro
DcdefBF522.h69 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
70 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
/linux-3.4.99/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h36 #define SIC_IWR1 0xFFC00130 /* Interrupt Wakeup Register 1 */ macro
DcdefBF538.h42 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
43 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
44 #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0))
45 #define bfin_write_SIC_IWR(x, val) bfin_write32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0), val)
/linux-3.4.99/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h46 #define SIC_IWR1 0xffc00128 /* System Interrupt Wakeup Register 1 */ macro
DcdefBF54x_base.h61 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
62 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
/linux-3.4.99/arch/blackfin/kernel/
Ddebug-mmrs.c1490 D32(SIC_IWR1); in bfin_debug_mmrs_init()