Searched refs:SIC_IAR5 (Results 1 – 12 of 12) sorted by relevance
400 PM_SYS_PUSH(8, SIC_IAR5)824 PM_SYS_POP(8, SIC_IAR5)
38 #define SIC_IAR5 0xFFC00154 /* Interrupt Assignment register5 */ macro
61 #define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)62 #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
40 #define SIC_IAR5 0xFFC00138 /* SIC Interrupt Assignment Register 5 */ macro
46 #define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)47 #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5,val)
41 #define SIC_IAR5 0xFFC00154 /* Interrupt Assignment register5 */ macro
38 #define SIC_IAR5 0xFFC00138 /* Interrupt Assignment Register 5 */ macro
56 #define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)57 #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
53 #define SIC_IAR5 0xffc00144 /* System Interrupt Assignment Register 5 */ macro
75 #define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)76 #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
1467 D32(SIC_IAR5); in bfin_debug_mmrs_init()