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Searched refs:SD_CFG1 (Results 1 – 6 of 6) sorted by relevance

/linux-3.4.99/drivers/staging/rts5139/
Dsd_cprm.c312 rts51x_write_register(chip, SD_CFG1, 0x03,
318 rts51x_write_register(chip, SD_CFG1, 0x03,
326 rts51x_write_register(chip, SD_CFG1, 0x03, SD_BUS_WIDTH_4);
496 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0x03, bus_width);
638 rts51x_write_register(chip, SD_CFG1, 0x03,
644 rts51x_write_register(chip, SD_CFG1, 0x03,
651 rts51x_write_register(chip, SD_CFG1, 0x03, SD_BUS_WIDTH_4);
Dsd.c328 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0x03, bus_width);
406 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0x03, bus_width);
564 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1,
570 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1,
583 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0x0C, SD_20_MODE);
886 RTS51X_WRITE_REG(chip, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
1237 RTS51X_WRITE_REG(chip, SD_CFG1, 0x0C, SD_DDR_MODE);
1848 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0xFF,
2245 RTS51X_WRITE_REG(chip, SD_CFG1, SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
2774 RTS51X_WRITE_REG(chip, SD_CFG1, SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
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Drts51x_card.h649 #define SD_CFG1 0xFDA0 macro
/linux-3.4.99/drivers/staging/rts_pstor/
Drtsx_card.h770 #define SD_CFG1 0xFDA0 macro
Dsd.c84 REG_SD_CFG1 = SD_CFG1; in sd_init_reg_addr()
546 RTSX_WRITE_REG(chip, SD_CFG1, 0x0C | SD_ASYNC_FIFO_NOT_RST, in sd_set_sample_push_timing()
553 RTSX_WRITE_REG(chip, SD_CFG1, 0x0C | SD_ASYNC_FIFO_NOT_RST, in sd_set_sample_push_timing()
566 RTSX_WRITE_REG(chip, SD_CFG1, 0x0C, SD_20_MODE); in sd_set_sample_push_timing()
956 RTSX_WRITE_REG(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); in sd_change_phase()
Dxd.c404 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_CFG1, 0x03, SD_BUS_WIDTH_4); in xd_clear_dma_buffer()