Searched refs:SCR0 (Results 1 – 5 of 5) sorted by relevance
127 # GR31 - EAR0 ^ SCR0128 # SCR0 - base of virtual range covered by cached PGE from last ITLB miss (or 0xffffffff)130 # DAMR4 - mapped page table as matched by SCR0
108 #define SCR0 0xFFFFB2 macro
221 #define SCR0 0xFFFF7A macro
30 SCR0, DAMR4 Instruction TLB PGE/PTD cache178 Grouping page tables in this fashion makes PGE caching in SCR0/SCR1 more efficient because the
104 SCR0 MMU See mmu-layout.txt.