1 /* internal Peripherals Register address define */ 2 /* CPU: H8/306x */ 3 4 #if !defined(__REGS_H8S267x__) 5 #define __REGS_H8S267x__ 6 7 #if defined(__KERNEL__) 8 9 #define DASTCR 0xFEE01A 10 #define DADR0 0xFFFFA4 11 #define DADR1 0xFFFFA5 12 #define DACR01 0xFFFFA6 13 #define DADR2 0xFFFFA8 14 #define DADR3 0xFFFFA9 15 #define DACR23 0xFFFFAA 16 17 #define ADDRA 0xFFFF90 18 #define ADDRAH 0xFFFF90 19 #define ADDRAL 0xFFFF91 20 #define ADDRB 0xFFFF92 21 #define ADDRBH 0xFFFF92 22 #define ADDRBL 0xFFFF93 23 #define ADDRC 0xFFFF94 24 #define ADDRCH 0xFFFF94 25 #define ADDRCL 0xFFFF95 26 #define ADDRD 0xFFFF96 27 #define ADDRDH 0xFFFF96 28 #define ADDRDL 0xFFFF97 29 #define ADDRE 0xFFFF98 30 #define ADDREH 0xFFFF98 31 #define ADDREL 0xFFFF99 32 #define ADDRF 0xFFFF9A 33 #define ADDRFH 0xFFFF9A 34 #define ADDRFL 0xFFFF9B 35 #define ADDRG 0xFFFF9C 36 #define ADDRGH 0xFFFF9C 37 #define ADDRGL 0xFFFF9D 38 #define ADDRH 0xFFFF9E 39 #define ADDRHH 0xFFFF9E 40 #define ADDRHL 0xFFFF9F 41 42 #define ADCSR 0xFFFFA0 43 #define ADCR 0xFFFFA1 44 45 #define ABWCR 0xFFFEC0 46 #define ASTCR 0xFFFEC1 47 #define WTCRAH 0xFFFEC2 48 #define WTCRAL 0xFFFEC3 49 #define WTCRBH 0xFFFEC4 50 #define WTCRBL 0xFFFEC5 51 #define RDNCR 0xFFFEC6 52 #define CSACRH 0xFFFEC8 53 #define CSACRL 0xFFFEC9 54 #define BROMCRH 0xFFFECA 55 #define BROMCRL 0xFFFECB 56 #define BCR 0xFFFECC 57 #define DRAMCR 0xFFFED0 58 #define DRACCR 0xFFFED2 59 #define REFCR 0xFFFED4 60 #define RTCNT 0xFFFED6 61 #define RTCOR 0xFFFED7 62 63 #define MAR0AH 0xFFFEE0 64 #define MAR0AL 0xFFFEE2 65 #define IOAR0A 0xFFFEE4 66 #define ETCR0A 0xFFFEE6 67 #define MAR0BH 0xFFFEE8 68 #define MAR0BL 0xFFFEEA 69 #define IOAR0B 0xFFFEEC 70 #define ETCR0B 0xFFFEEE 71 #define MAR1AH 0xFFFEF0 72 #define MAR1AL 0xFFFEF2 73 #define IOAR1A 0xFFFEF4 74 #define ETCR1A 0xFFFEF6 75 #define MAR1BH 0xFFFEF8 76 #define MAR1BL 0xFFFEFA 77 #define IOAR1B 0xFFFEFC 78 #define ETCR1B 0xFFFEFE 79 #define DMAWER 0xFFFF20 80 #define DMATCR 0xFFFF21 81 #define DMACR0A 0xFFFF22 82 #define DMACR0B 0xFFFF23 83 #define DMACR1A 0xFFFF24 84 #define DMACR1B 0xFFFF25 85 #define DMABCRH 0xFFFF26 86 #define DMABCRL 0xFFFF27 87 88 #define EDSAR0 0xFFFDC0 89 #define EDDAR0 0xFFFDC4 90 #define EDTCR0 0xFFFDC8 91 #define EDMDR0 0xFFFDCC 92 #define EDMDR0H 0xFFFDCC 93 #define EDMDR0L 0xFFFDCD 94 #define EDACR0 0xFFFDCE 95 #define EDSAR1 0xFFFDD0 96 #define EDDAR1 0xFFFDD4 97 #define EDTCR1 0xFFFDD8 98 #define EDMDR1 0xFFFDDC 99 #define EDMDR1H 0xFFFDDC 100 #define EDMDR1L 0xFFFDDD 101 #define EDACR1 0xFFFDDE 102 #define EDSAR2 0xFFFDE0 103 #define EDDAR2 0xFFFDE4 104 #define EDTCR2 0xFFFDE8 105 #define EDMDR2 0xFFFDEC 106 #define EDMDR2H 0xFFFDEC 107 #define EDMDR2L 0xFFFDED 108 #define EDACR2 0xFFFDEE 109 #define EDSAR3 0xFFFDF0 110 #define EDDAR3 0xFFFDF4 111 #define EDTCR3 0xFFFDF8 112 #define EDMDR3 0xFFFDFC 113 #define EDMDR3H 0xFFFDFC 114 #define EDMDR3L 0xFFFDFD 115 #define EDACR3 0xFFFDFE 116 117 #define IPRA 0xFFFE00 118 #define IPRB 0xFFFE02 119 #define IPRC 0xFFFE04 120 #define IPRD 0xFFFE06 121 #define IPRE 0xFFFE08 122 #define IPRF 0xFFFE0A 123 #define IPRG 0xFFFE0C 124 #define IPRH 0xFFFE0E 125 #define IPRI 0xFFFE10 126 #define IPRJ 0xFFFE12 127 #define IPRK 0xFFFE14 128 #define ITSR 0xFFFE16 129 #define SSIER 0xFFFE18 130 #define ISCRH 0xFFFE1A 131 #define ISCRL 0xFFFE1C 132 133 #define INTCR 0xFFFF31 134 #define IER 0xFFFF32 135 #define IERH 0xFFFF32 136 #define IERL 0xFFFF33 137 #define ISR 0xFFFF34 138 #define ISRH 0xFFFF34 139 #define ISRL 0xFFFF35 140 141 #define P1DDR 0xFFFE20 142 #define P2DDR 0xFFFE21 143 #define P3DDR 0xFFFE22 144 #define P4DDR 0xFFFE23 145 #define P5DDR 0xFFFE24 146 #define P6DDR 0xFFFE25 147 #define P7DDR 0xFFFE26 148 #define P8DDR 0xFFFE27 149 #define P9DDR 0xFFFE28 150 #define PADDR 0xFFFE29 151 #define PBDDR 0xFFFE2A 152 #define PCDDR 0xFFFE2B 153 #define PDDDR 0xFFFE2C 154 #define PEDDR 0xFFFE2D 155 #define PFDDR 0xFFFE2E 156 #define PGDDR 0xFFFE2F 157 #define PHDDR 0xFFFF74 158 159 #define PFCR0 0xFFFE32 160 #define PFCR1 0xFFFE33 161 #define PFCR2 0xFFFE34 162 163 #define PAPCR 0xFFFE36 164 #define PBPCR 0xFFFE37 165 #define PCPCR 0xFFFE38 166 #define PDPCR 0xFFFE39 167 #define PEPCR 0xFFFE3A 168 169 #define P3ODR 0xFFFE3C 170 #define PAODR 0xFFFE3D 171 172 #define P1DR 0xFFFF60 173 #define P2DR 0xFFFF61 174 #define P3DR 0xFFFF62 175 #define P4DR 0xFFFF63 176 #define P5DR 0xFFFF64 177 #define P6DR 0xFFFF65 178 #define P7DR 0xFFFF66 179 #define P8DR 0xFFFF67 180 #define P9DR 0xFFFF68 181 #define PADR 0xFFFF69 182 #define PBDR 0xFFFF6A 183 #define PCDR 0xFFFF6B 184 #define PDDR 0xFFFF6C 185 #define PEDR 0xFFFF6D 186 #define PFDR 0xFFFF6E 187 #define PGDR 0xFFFF6F 188 #define PHDR 0xFFFF72 189 190 #define PORT1 0xFFFF50 191 #define PORT2 0xFFFF51 192 #define PORT3 0xFFFF52 193 #define PORT4 0xFFFF53 194 #define PORT5 0xFFFF54 195 #define PORT6 0xFFFF55 196 #define PORT7 0xFFFF56 197 #define PORT8 0xFFFF57 198 #define PORT9 0xFFFF58 199 #define PORTA 0xFFFF59 200 #define PORTB 0xFFFF5A 201 #define PORTC 0xFFFF5B 202 #define PORTD 0xFFFF5C 203 #define PORTE 0xFFFF5D 204 #define PORTF 0xFFFF5E 205 #define PORTG 0xFFFF5F 206 #define PORTH 0xFFFF70 207 208 #define PCR 0xFFFF46 209 #define PMR 0xFFFF47 210 #define NDERH 0xFFFF48 211 #define NDERL 0xFFFF49 212 #define PODRH 0xFFFF4A 213 #define PODRL 0xFFFF4B 214 #define NDRH1 0xFFFF4C 215 #define NDRL1 0xFFFF4D 216 #define NDRH2 0xFFFF4E 217 #define NDRL2 0xFFFF4F 218 219 #define SMR0 0xFFFF78 220 #define BRR0 0xFFFF79 221 #define SCR0 0xFFFF7A 222 #define TDR0 0xFFFF7B 223 #define SSR0 0xFFFF7C 224 #define RDR0 0xFFFF7D 225 #define SCMR0 0xFFFF7E 226 #define SMR1 0xFFFF80 227 #define BRR1 0xFFFF81 228 #define SCR1 0xFFFF82 229 #define TDR1 0xFFFF83 230 #define SSR1 0xFFFF84 231 #define RDR1 0xFFFF85 232 #define SCMR1 0xFFFF86 233 #define SMR2 0xFFFF88 234 #define BRR2 0xFFFF89 235 #define SCR2 0xFFFF8A 236 #define TDR2 0xFFFF8B 237 #define SSR2 0xFFFF8C 238 #define RDR2 0xFFFF8D 239 #define SCMR2 0xFFFF8E 240 241 #define IRCR0 0xFFFE1E 242 #define SEMR 0xFFFDA8 243 244 #define MDCR 0xFFFF3E 245 #define SYSCR 0xFFFF3D 246 #define MSTPCRH 0xFFFF40 247 #define MSTPCRL 0xFFFF41 248 #define FLMCR1 0xFFFFC8 249 #define FLMCR2 0xFFFFC9 250 #define EBR1 0xFFFFCA 251 #define EBR2 0xFFFFCB 252 #define CTGARC_RAMCR 0xFFFECE 253 #define SBYCR 0xFFFF3A 254 #define SCKCR 0xFFFF3B 255 #define PLLCR 0xFFFF45 256 257 #define TSTR 0xFFFFC0 258 #define TSNC 0XFFFFC1 259 260 #define TCR0 0xFFFFD0 261 #define TMDR0 0xFFFFD1 262 #define TIORH0 0xFFFFD2 263 #define TIORL0 0xFFFFD3 264 #define TIER0 0xFFFFD4 265 #define TSR0 0xFFFFD5 266 #define TCNT0 0xFFFFD6 267 #define GRA0 0xFFFFD8 268 #define GRB0 0xFFFFDA 269 #define GRC0 0xFFFFDC 270 #define GRD0 0xFFFFDE 271 #define TCR1 0xFFFFE0 272 #define TMDR1 0xFFFFE1 273 #define TIORH1 0xFFFFE2 274 #define TIORL1 0xFFFFE3 275 #define TIER1 0xFFFFE4 276 #define TSR1 0xFFFFE5 277 #define TCNT1 0xFFFFE6 278 #define GRA1 0xFFFFE8 279 #define GRB1 0xFFFFEA 280 #define TCR2 0xFFFFF0 281 #define TMDR2 0xFFFFF1 282 #define TIORH2 0xFFFFF2 283 #define TIORL2 0xFFFFF3 284 #define TIER2 0xFFFFF4 285 #define TSR2 0xFFFFF5 286 #define TCNT2 0xFFFFF6 287 #define GRA2 0xFFFFF8 288 #define GRB2 0xFFFFFA 289 #define TCR3 0xFFFE80 290 #define TMDR3 0xFFFE81 291 #define TIORH3 0xFFFE82 292 #define TIORL3 0xFFFE83 293 #define TIER3 0xFFFE84 294 #define TSR3 0xFFFE85 295 #define TCNT3 0xFFFE86 296 #define GRA3 0xFFFE88 297 #define GRB3 0xFFFE8A 298 #define GRC3 0xFFFE8C 299 #define GRD3 0xFFFE8E 300 #define TCR4 0xFFFE90 301 #define TMDR4 0xFFFE91 302 #define TIORH4 0xFFFE92 303 #define TIORL4 0xFFFE93 304 #define TIER4 0xFFFE94 305 #define TSR4 0xFFFE95 306 #define TCNT4 0xFFFE96 307 #define GRA4 0xFFFE98 308 #define GRB4 0xFFFE9A 309 #define TCR5 0xFFFEA0 310 #define TMDR5 0xFFFEA1 311 #define TIORH5 0xFFFEA2 312 #define TIORL5 0xFFFEA3 313 #define TIER5 0xFFFEA4 314 #define TSR5 0xFFFEA5 315 #define TCNT5 0xFFFEA6 316 #define GRA5 0xFFFEA8 317 #define GRB5 0xFFFEAA 318 319 #define _8TCR0 0xFFFFB0 320 #define _8TCR1 0xFFFFB1 321 #define _8TCSR0 0xFFFFB2 322 #define _8TCSR1 0xFFFFB3 323 #define _8TCORA0 0xFFFFB4 324 #define _8TCORA1 0xFFFFB5 325 #define _8TCORB0 0xFFFFB6 326 #define _8TCORB1 0xFFFFB7 327 #define _8TCNT0 0xFFFFB8 328 #define _8TCNT1 0xFFFFB9 329 330 #define TCSR 0xFFFFBC 331 #define TCNT 0xFFFFBD 332 #define RSTCSRW 0xFFFFBE 333 #define RSTCSRR 0xFFFFBF 334 335 #endif /* __KERNEL__ */ 336 #endif /* __REGS_H8S267x__ */ 337