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Searched refs:S5P_CLK_DIV1 (Results 1 – 5 of 5) sorted by relevance

/linux-3.4.99/arch/arm/mach-s5pc100/include/mach/
Dregs-clock.h38 #define S5P_CLK_DIV1 S5P_CLKREG(0x304) macro
/linux-3.4.99/arch/arm/mach-s5pc100/
Dclock.c165 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 3 },
191 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 3 },
199 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 1 },
207 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 2 },
233 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 2 },
241 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 3 },
249 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 24, .size = 5 },
/linux-3.4.99/arch/arm/mach-s5pv210/
Dclock.c633 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4},
862 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 },
871 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 4 },
880 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 },
917 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
1259 clkdiv1 = __raw_readl(S5P_CLK_DIV1); in s5pv210_setup_clocks()
Dpm.c45 SAVE_ITEM(S5P_CLK_DIV1),
/linux-3.4.99/arch/arm/mach-s5pv210/include/mach/
Dregs-clock.h43 #define S5P_CLK_DIV1 S5P_CLKREG(0x304) macro