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Searched refs:S5P64X0_CLK_DIV2 (Results 1 – 4 of 4) sorted by relevance

/linux-3.4.99/arch/arm/mach-s5p64x0/
Dclock-s5p6450.c411 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 8, .size = 4 },
441 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 20, .size = 4 },
525 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
537 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
549 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
Dclock-s5p6440.c416 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
464 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
476 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
488 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
Dpm.c36 SAVE_ITEM(S5P64X0_CLK_DIV2),
/linux-3.4.99/arch/arm/mach-s5p64x0/include/mach/
Dregs-clock.h29 #define S5P64X0_CLK_DIV2 S5P_CLKREG(0x28) macro