Home
last modified time | relevance | path

Searched refs:RS (Results 1 – 25 of 39) sorted by relevance

12

/linux-3.4.99/arch/powerpc/xmon/
Dppc-opc.c422 #define RS RBS + 1 macro
423 #define RT RS
429 #define RSQ RS + 1
2073 { "efscfd", VX(4, 719), VX_MASK, PPCEFS, { RS, RB } },
2074 { "efdabs", VX(4, 740), VX_MASK, PPCEFS, { RS, RA } },
2075 { "efdnabs", VX(4, 741), VX_MASK, PPCEFS, { RS, RA } },
2076 { "efdneg", VX(4, 742), VX_MASK, PPCEFS, { RS, RA } },
2077 { "efdadd", VX(4, 736), VX_MASK, PPCEFS, { RS, RA, RB } },
2078 { "efdsub", VX(4, 737), VX_MASK, PPCEFS, { RS, RA, RB } },
2079 { "efdmul", VX(4, 744), VX_MASK, PPCEFS, { RS, RA, RB } },
[all …]
/linux-3.4.99/arch/mips/mm/
Duasm.c25 RS = 0x001, enumerator
91 { insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
92 { insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD },
93 { insn_and, M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD },
94 { insn_andi, M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
95 { insn_beq, M(beq_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
96 { insn_beql, M(beql_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
97 { insn_bgez, M(bcond_op, 0, bgez_op, 0, 0, 0), RS | BIMM },
98 { insn_bgezl, M(bcond_op, 0, bgezl_op, 0, 0, 0), RS | BIMM },
99 { insn_bltz, M(bcond_op, 0, bltz_op, 0, 0, 0), RS | BIMM },
[all …]
/linux-3.4.99/drivers/macintosh/
Dvia-macii.c41 #define RS 0x200 /* skip between registers */ macro
43 #define A RS /* A-side data */
44 #define DIRB (2*RS) /* B-side direction (1=output) */
45 #define DIRA (3*RS) /* A-side direction (1=output) */
46 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
47 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
48 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
49 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
50 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
51 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
[all …]
Dvia-cuda.c35 #define RS 0x200 /* skip between registers */ macro
37 #define A RS /* A-side data */
38 #define DIRB (2*RS) /* B-side direction (1=output) */
39 #define DIRA (3*RS) /* A-side direction (1=output) */
40 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
41 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
42 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
43 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
44 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
45 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
[all …]
Dvia-pmu68k.c47 #define RS 0x200 /* skip between registers */ macro
49 #define A RS /* A-side data */
50 #define DIRB (2*RS) /* B-side direction (1=output) */
51 #define DIRA (3*RS) /* A-side direction (1=output) */
52 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
53 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
54 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
55 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
56 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
57 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
[all …]
Dvia-maciisi.c32 #define RS 0x200 /* skip between registers */ macro
34 #define A RS /* A-side data */
35 #define DIRB (2*RS) /* B-side direction (1=output) */
36 #define DIRA (3*RS) /* A-side direction (1=output) */
37 #define SR (10*RS) /* Shift register */
38 #define ACR (11*RS) /* Auxiliary control register */
39 #define IFR (13*RS) /* Interrupt flag register */
40 #define IER (14*RS) /* Interrupt enable register */
Dvia-pmu.c79 #define RS 0x200 /* skip between registers */ macro
81 #define A RS /* A-side data */
82 #define DIRB (2*RS) /* B-side direction (1=output) */
83 #define DIRA (3*RS) /* A-side direction (1=output) */
84 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
85 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
86 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
87 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
88 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
89 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
[all …]
/linux-3.4.99/arch/powerpc/platforms/powermac/
Dtime.c53 #define RS 0x200 /* skip between registers */ macro
54 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
55 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
56 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
57 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
58 #define ACR (11*RS) /* Auxiliary control register */
59 #define IFR (13*RS) /* Interrupt flag register */
/linux-3.4.99/arch/cris/arch-v32/drivers/
DKconfig92 bool "RS-485 support"
95 Enables support for RS-485 serial communication.
121 bool "Ser0 is a RS-232 port"
123 Configure serial port 0 to be a RS-232 port.
126 bool "Ser0 is a half duplex RS-485 port"
129 Configure serial port 0 to be a half duplex (two wires) RS-485 port.
132 bool "Ser0 is a full duplex RS-485 port"
135 Configure serial port 0 to be a full duplex (four wires) RS-485 port.
168 bool "Ser1 is a RS-232 port"
170 Configure serial port 1 to be a RS-232 port.
[all …]
/linux-3.4.99/drivers/char/pcmcia/
DKconfig14 selectable for RS-232, V.35, RS-449, RS-530, and X.21
/linux-3.4.99/arch/arm/mm/
Dproc-arm6_7.S250 mov r0, #0x3d @ . ..RS BLDP WCAM
253 mov r0, #0x3c @ . ..RS BLDP WCA.
264 mov r0, #0x7d @ . ..RS BLDP WCAM
267 mov r0, #0x7c @ . ..RS BLDP WCA.
/linux-3.4.99/arch/m68k/fpsp040/
Dstan.S236 fmulx %fp0,%fp2 | ...RS(P1+S(P2+SP3))
241 faddx %fp2,%fp0 | ...R+RS(P1+S(P2+SP3))
274 fmulx %fp1,%fp2 | ...RS(P1+S(P2+SP3))
279 faddx %fp2,%fp1 | ...R+RS(P1+S(P2+SP3))
/linux-3.4.99/drivers/staging/media/dt3155v4l/
DKconfig20 or leave it unselected for RS-170/60Hz (North America).
/linux-3.4.99/drivers/staging/panel/
DKconfig161 (E, RS, sometimes RW), and 4 or 8 for the data. Use 0 here for a 8 bits
181 int "Parallel port pin number & polarity connected to the LCD RS signal (-17...17) "
185 This describes the number of the parallel port pin to which the LCD 'RS'
192 Default for the 'RS' pin in custom profile is '17' (SELECT IN).
/linux-3.4.99/Documentation/usb/
Dlinux-cdc-acm.inf107 SERVICE = "USB RS-232 Emulation Driver"
/linux-3.4.99/arch/cris/arch-v10/drivers/
DKconfig383 bool "RS-485 support"
386 Enables support for RS-485 serial communication. For a primer on
387 RS-485, see <http://en.wikipedia.org/wiki/Rs485>
390 bool "RS-485 mode on PA"
398 int "RS-485 mode on PA bit"
/linux-3.4.99/arch/powerpc/kernel/
Dmisc_64.S306 #define STBCIX(RS,RA,RB) .long (0x7c0007aa|(RS<<21)|(RA<<16)|(RB << 11)) argument
/linux-3.4.99/lib/raid6/
Dint.uc92 q = dptr[z0+2]; /* RS syndrome */
Daltivec.uc82 q = dptr[z0+2]; /* RS syndrome */
/linux-3.4.99/Documentation/scsi/
Darcmsr_spec.txt7 ** 2. Doorbell is used for RS-232 emulation
23 ** 4. RS-232 emulation
106 ** RS-232 Interface for Areca Raid Controller
/linux-3.4.99/drivers/s390/net/
DKconfig68 that use CLAW are RS/6000s, Cisco Routers (CIP) and 3172 devices.
/linux-3.4.99/Documentation/serial/
Dserial-rs485.txt5 EIA-485, also known as TIA/EIA-485 or RS-485, is a standard defining the
/linux-3.4.99/drivers/tty/
DKconfig271 RS-232, V.35, RS-449, RS-530, and X.21
/linux-3.4.99/drivers/net/wan/
Dpc300-falc-lh.h1235 #define RS(nbr) (0x70 + (nbr)) /* Rx CAS Reg (0 to 15) */ macro
/linux-3.4.99/firmware/
DMakefile78 fw-shipped-$(CONFIG_SERIAL_8250_CS) += cis/MT5634ZLX.cis cis/RS-COM-2P.cis \

12