| /linux-3.4.99/arch/unicore32/include/asm/ |
| D | ptrace.h | 29 #define PSR_I_BIT 0x00000080 macro
96 (!((regs)->UCreg_asr & PSR_I_BIT))
113 if ((regs->UCreg_asr & PSR_I_BIT) == 0) { in valid_user_regs()
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| D | irqflags.h | 19 #define ARCH_IRQ_DISABLED (PRIV_MODE | PSR_I_BIT)
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| D | assembler.h | 46 or \temp, \temp, #PSR_I_BIT | PRIV_MODE
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| /linux-3.4.99/arch/unicore32/kernel/ |
| D | setup.c | 120 "r" (PSR_R_BIT | PSR_I_BIT | INTR_MODE), in cpu_init()
122 "r" (PSR_R_BIT | PSR_I_BIT | ABRT_MODE), in cpu_init()
124 "r" (PSR_R_BIT | PSR_I_BIT | EXTN_MODE), in cpu_init()
126 "r" (PSR_R_BIT | PSR_I_BIT | PRIV_MODE) in cpu_init()
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| D | entry.S | 260 cand.a r3, #PSR_I_BIT
262 andn r17, r17, #PSR_I_BIT
330 cand.a r3, #PSR_I_BIT
332 andn r17, r17, #PSR_I_BIT
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| D | head.S | 64 or r0, #PSR_R_BIT | PSR_I_BIT @ disable irqs
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| D | process.c | 338 regs.UCreg_asr = regs.UCreg_07 | PSR_I_BIT; in kernel_thread()
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| /linux-3.4.99/arch/arm/include/asm/ |
| D | ptrace.h | 53 #define PSR_I_BIT 0x00000080 macro
158 (!((regs)->ARM_cpsr & PSR_I_BIT))
175 if ((regs->ARM_cpsr & PSR_I_BIT) == 0) { in valid_user_regs()
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| D | irqflags.h | 151 return flags & PSR_I_BIT; in arch_irqs_disabled_flags()
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| D | assembler.h | 92 msr cpsr_c, #PSR_I_BIT | SVC_MODE
156 tst \oldcpsr, #PSR_I_BIT
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| /linux-3.4.99/arch/arm/kernel/ |
| D | fiqasm.S | 26 mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
39 mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
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| D | iwmmxt.S | 184 orr r2, ip, #PSR_I_BIT @ disable interrupts
234 orr r2, ip, #PSR_I_BIT @ disable interrupts
270 orr r2, ip, #PSR_I_BIT @ disable interrupts
333 orr ip, r2, #PSR_I_BIT @ disable interrupts
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| D | head-nommu.S | 45 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
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| D | setup.c | 421 PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE), in cpu_init()
423 PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE), in cpu_init()
425 PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE), in cpu_init()
427 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE) in cpu_init()
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| D | sleep.S | 93 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
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| D | process.c | 497 regs.ARM_cpsr = regs.ARM_r7 | PSR_I_BIT; in kernel_thread()
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| D | head.S | 94 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
352 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
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| D | entry-armv.S | 202 tst r5, #PSR_I_BIT
204 tst r5, #PSR_I_BIT
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| D | kprobes.c | 473 cpsr = regs->ARM_cpsr | PSR_I_BIT; in setjmp_pre_handler()
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| /linux-3.4.99/arch/arm/plat-s3c24xx/ |
| D | sleep.S | 57 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
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| /linux-3.4.99/arch/arm/mach-s3c64xx/ |
| D | sleep.S | 43 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
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| /linux-3.4.99/arch/arm/mach-ep93xx/ |
| D | crunch-bits.S | 205 orr r2, ip, #PSR_I_BIT @ disable interrupts
251 orr r2, ip, #PSR_I_BIT @ disable interrupts
284 orr r2, ip, #PSR_I_BIT @ disable interrupts
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| /linux-3.4.99/arch/arm/mm/ |
| D | proc-feroceon.S | 262 orr r3, r2, #PSR_I_BIT
308 orr r3, r2, #PSR_I_BIT
340 orr r3, r2, #PSR_I_BIT
371 orr r3, r2, #PSR_I_BIT
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| D | proc-xsc3.S | 110 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
450 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
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| /linux-3.4.99/arch/unicore32/mm/ |
| D | proc-ucv2.S | 23 mov ip, #PSR_R_BIT | PSR_I_BIT | PRIV_MODE
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