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Searched refs:PSB_WVDC32 (Results 1 – 9 of 9) sorted by relevance

/linux-3.4.99/drivers/gpu/drm/gma500/
Doaktrail_device.c268 PSB_WVDC32(0, PP_CONTROL); in oaktrail_save_display_registers()
275 PSB_WVDC32(0x58000000, DSPACNTR); in oaktrail_save_display_registers()
277 PSB_WVDC32(0, DSPASURF); in oaktrail_save_display_registers()
283 PSB_WVDC32(0x0, PIPEACONF); in oaktrail_save_display_registers()
288 PSB_WVDC32(0, MRST_DPLL_A); in oaktrail_save_display_registers()
307 PSB_WVDC32(regs->psb.saveDSPARB, DSPARB); in oaktrail_restore_display_registers()
308 PSB_WVDC32(regs->psb.saveDSPFW1, DSPFW1); in oaktrail_restore_display_registers()
309 PSB_WVDC32(regs->psb.saveDSPFW2, DSPFW2); in oaktrail_restore_display_registers()
310 PSB_WVDC32(regs->psb.saveDSPFW3, DSPFW3); in oaktrail_restore_display_registers()
311 PSB_WVDC32(regs->psb.saveDSPFW4, DSPFW4); in oaktrail_restore_display_registers()
[all …]
Doaktrail_hdmi.c498 PSB_WVDC32(hdmi_dev->saveDPLL_CTRL, DPLL_CTRL); in oaktrail_hdmi_restore()
499 PSB_WVDC32(hdmi_dev->saveDPLL_DIV_CTRL, DPLL_DIV_CTRL); in oaktrail_hdmi_restore()
500 PSB_WVDC32(hdmi_dev->saveDPLL_ADJUST, DPLL_ADJUST); in oaktrail_hdmi_restore()
501 PSB_WVDC32(hdmi_dev->saveDPLL_UPDATE, DPLL_UPDATE); in oaktrail_hdmi_restore()
502 PSB_WVDC32(hdmi_dev->saveDPLL_CLK_ENABLE, DPLL_CLK_ENABLE); in oaktrail_hdmi_restore()
506 PSB_WVDC32(regs->savePIPEBSRC, PIPEBSRC); in oaktrail_hdmi_restore()
507 PSB_WVDC32(regs->saveHTOTAL_B, HTOTAL_B); in oaktrail_hdmi_restore()
508 PSB_WVDC32(regs->saveHBLANK_B, HBLANK_B); in oaktrail_hdmi_restore()
509 PSB_WVDC32(regs->saveHSYNC_B, HSYNC_B); in oaktrail_hdmi_restore()
510 PSB_WVDC32(regs->saveVTOTAL_B, VTOTAL_B); in oaktrail_hdmi_restore()
[all …]
Dpsb_irq.c95 PSB_WVDC32(writeVal, reg); in psb_enable_pipestat()
111 PSB_WVDC32(writeVal, reg); in psb_disable_pipestat()
123 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R); in mid_enable_pipe_event()
124 PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); in mid_enable_pipe_event()
135 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R); in mid_disable_pipe_event()
136 PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); in mid_disable_pipe_event()
169 PSB_WVDC32(PSB_RVDC32(pipe_stat_reg), pipe_stat_reg); in mid_pipe_event_handler()
244 PSB_WVDC32(vdc_stat, PSB_INT_IDENTITY_R); in psb_irq_handler()
263 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); in psb_irq_preinstall()
277 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R); in psb_irq_preinstall()
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Dmdfld_device.c504 PSB_WVDC32(0x80000000, VGACNTRL); in mdfld_restore_display_registers()
507 PSB_WVDC32(dpll_val & ~DPLL_VCO_ENABLE, dpll_reg); in mdfld_restore_display_registers()
510 PSB_WVDC32(fp_val, fp_reg); in mdfld_restore_display_registers()
521 PSB_WVDC32(dpll, dpll_reg); in mdfld_restore_display_registers()
526 PSB_WVDC32(fp_val, fp_reg); in mdfld_restore_display_registers()
527 PSB_WVDC32(dpll_val, dpll_reg); in mdfld_restore_display_registers()
532 PSB_WVDC32(dpll_val, dpll_reg); in mdfld_restore_display_registers()
550 PSB_WVDC32(htot_val, htot_reg); in mdfld_restore_display_registers()
551 PSB_WVDC32(hblank_val, hblank_reg); in mdfld_restore_display_registers()
552 PSB_WVDC32(hsync_val, hsync_reg); in mdfld_restore_display_registers()
[all …]
Dpsb_device.c221 PSB_WVDC32(regs->saveDSPARB, DSPARB); in psb_restore_display_registers()
222 PSB_WVDC32(regs->saveDSPFW1, DSPFW1); in psb_restore_display_registers()
223 PSB_WVDC32(regs->saveDSPFW2, DSPFW2); in psb_restore_display_registers()
224 PSB_WVDC32(regs->saveDSPFW3, DSPFW3); in psb_restore_display_registers()
225 PSB_WVDC32(regs->saveDSPFW4, DSPFW4); in psb_restore_display_registers()
226 PSB_WVDC32(regs->saveDSPFW5, DSPFW5); in psb_restore_display_registers()
227 PSB_WVDC32(regs->saveDSPFW6, DSPFW6); in psb_restore_display_registers()
228 PSB_WVDC32(regs->saveCHICKENBIT, DSPCHICKENBIT); in psb_restore_display_registers()
231 PSB_WVDC32(0x80000000, VGACNTRL); in psb_restore_display_registers()
Dpsb_drv.c369 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); in psb_driver_load()
370 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R); in psb_driver_load()
371 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R); in psb_driver_load()
Dgtt.c398 PSB_WVDC32(dev_priv->pge_ctl, PSB_PGETBL_CTL); in psb_gtt_takedown()
430 PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL); in psb_gtt_init()
Dpower.c110 PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL); in gma_resume_display()
Dpsb_drv.h968 #define PSB_WVDC32(_val, _offs) iowrite32(_val, dev_priv->vdc_reg + (_offs)) macro