Searched refs:POSTING_READ (Results 1 – 13 of 13) sorted by relevance
151 POSTING_READ(VIDEO_DIP_CTL); in i9xx_write_infoframe()184 POSTING_READ(reg); in ironlake_write_infoframe()266 POSTING_READ(intel_hdmi->sdvox_reg); in intel_hdmi_mode_set()290 POSTING_READ(intel_hdmi->sdvox_reg); in intel_hdmi_dpms()300 POSTING_READ(intel_hdmi->sdvox_reg); in intel_hdmi_dpms()307 POSTING_READ(intel_hdmi->sdvox_reg); in intel_hdmi_dpms()558 POSTING_READ(VIDEO_DIP_CTL); in intel_hdmi_init()563 POSTING_READ(TVIDEO_DIP_CTL(i)); in intel_hdmi_init()
74 POSTING_READ(DEIMR); in ironlake_enable_display_irq()84 POSTING_READ(DEIMR); in ironlake_disable_display_irq()97 POSTING_READ(reg); in i915_enable_pipestat()109 POSTING_READ(reg); in i915_disable_pipestat()445 POSTING_READ(GEN6_PMIMR); in gen6_queue_rps_work()504 POSTING_READ(DEIER); in ivybridge_irq_handler()567 POSTING_READ(DEIER); in ivybridge_irq_handler()590 POSTING_READ(DEIER); in ironlake_irq_handler()664 POSTING_READ(DEIER); in ironlake_irq_handler()1122 POSTING_READ(IPEIR_I965); in i915_report_and_clear_eir()[all …]
123 POSTING_READ(bus->gpio_reg); in set_clock()140 POSTING_READ(bus->gpio_reg); in set_data()237 POSTING_READ(GMBUS2+reg_offset); in gmbus_xfer()267 POSTING_READ(GMBUS2+reg_offset); in gmbus_xfer()281 POSTING_READ(GMBUS2+reg_offset); in gmbus_xfer()
137 POSTING_READ(SPRSURF(pipe)); in ivb_update_plane()153 POSTING_READ(SPRSURF(pipe)); in ivb_disable_plane()180 POSTING_READ(SPRKEYMSK(intel_plane->pipe)); in ivb_update_colorkey()294 POSTING_READ(DVSSURF(pipe)); in snb_update_plane()310 POSTING_READ(DVSSURF(pipe)); in snb_disable_plane()359 POSTING_READ(DVSKEYMSK(intel_plane->pipe)); in snb_update_colorkey()
1047 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_vdd_on()1070 POSTING_READ(PCH_PP_CONTROL); in ironlake_panel_vdd_off_sync()1137 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_on()1145 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_on()1152 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_on()1174 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_off()1201 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_backlight_on()1217 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_backlight_off()1231 POSTING_READ(DP_A); in ironlake_edp_pll_on()1244 POSTING_READ(DP_A); in ironlake_edp_pll_off()[all …]
358 POSTING_READ(FORCEWAKE); in __gen6_gt_force_wake_get()374 POSTING_READ(FORCEWAKE_MT); in __gen6_gt_force_wake_mt_get()591 POSTING_READ(D_STATE); in i8xx_do_reset()598 POSTING_READ(DEBUG_RESET_I830); in i8xx_do_reset()602 POSTING_READ(DEBUG_RESET_I830); in i8xx_do_reset()608 POSTING_READ(D_STATE); in i8xx_do_reset()
1182 POSTING_READ(reg); in intel_enable_pll()1185 POSTING_READ(reg); in intel_enable_pll()1188 POSTING_READ(reg); in intel_enable_pll()1217 POSTING_READ(reg); in intel_disable_pll()1247 POSTING_READ(reg); in intel_enable_pch_pll()1280 POSTING_READ(reg); in intel_disable_pch_pll()1539 POSTING_READ(reg); in intel_disable_pch_ports()1685 POSTING_READ(GEN6_BLITTER_ECOSKPD); in sandybridge_blit_fbc_update()2164 POSTING_READ(reg); in i9xx_update_plane()2242 POSTING_READ(reg); in ironlake_update_plane()[all …]
460 POSTING_READ(dpll_a_reg); in i915_restore_modeset_reg()467 POSTING_READ(dpll_a_reg); in i915_restore_modeset_reg()471 POSTING_READ(_DPLL_A_MD); in i915_restore_modeset_reg()529 POSTING_READ(dpll_b_reg); in i915_restore_modeset_reg()536 POSTING_READ(dpll_b_reg); in i915_restore_modeset_reg()540 POSTING_READ(_DPLL_B_MD); in i915_restore_modeset_reg()795 POSTING_READ(VGA_PD); in i915_restore_display()
200 POSTING_READ(PCH_ADPA); in intel_ironlake_crt_detect_hotplug()384 POSTING_READ(pipeconf_reg); in intel_crt_load_detect()655 POSTING_READ(PCH_ADPA); in intel_crt_init()
674 POSTING_READ(GTIMR); in ironlake_enable_irq()682 POSTING_READ(GTIMR); in ironlake_disable_irq()690 POSTING_READ(IMR); in i915_enable_irq()698 POSTING_READ(IMR); in i915_disable_irq()769 POSTING_READ(mmio); in intel_ring_setup_status_page()
106 POSTING_READ(lvds_reg); in intel_lvds_enable()141 POSTING_READ(lvds_reg); in intel_lvds_disable()
1206 POSTING_READ(TV_DAC); in intel_tv_detect_type()1236 POSTING_READ(TV_CTL); in intel_tv_detect_type()
1495 #define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg) macro