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Searched refs:PIPECONF_ENABLE (Results 1 – 8 of 8) sorted by relevance

/linux-3.4.99/drivers/gpu/drm/i915/
Dintel_overlay.c255 if (I915_READ(_PIPEACONF) & PIPECONF_ENABLE) in i830_activate_pipe_a()
911 … (I915_READ(PIPECONF(crtc->pipe)) & (PIPECONF_DOUBLE_WIDE | PIPECONF_ENABLE)) != PIPECONF_ENABLE) in check_overlay_possible_on_crtc()
Dintel_sprite.c417 if (!(I915_READ(PIPECONF(pipe)) & PIPECONF_ENABLE)) in intel_update_plane()
Dintel_tv.c1095 I915_WRITE(pipeconf_reg, pipeconf & ~PIPECONF_ENABLE); in intel_tv_mode_set()
Dintel_display.c964 cur_state = !!(val & PIPECONF_ENABLE); in assert_pipe()
1389 if (val & PIPECONF_ENABLE) in intel_enable_pipe()
1392 I915_WRITE(reg, val | PIPECONF_ENABLE); in intel_enable_pipe()
1426 if ((val & PIPECONF_ENABLE) == 0) in intel_disable_pipe()
1429 I915_WRITE(reg, val & ~PIPECONF_ENABLE); in intel_disable_pipe()
Di915_irq.c149 return I915_READ(PIPECONF(pipe)) & PIPECONF_ENABLE; in i915_pipe_enabled()
Di915_reg.h2422 #define PIPECONF_ENABLE (1<<31) macro
/linux-3.4.99/drivers/video/intelfb/
Dintelfbhw.h286 #define PIPECONF_ENABLE (1 << 31) macro
Dintelfbhw.c1358 tmp &= ~PIPECONF_ENABLE; in intelfbhw_program_mode()
1370 tmp &= ~PIPECONF_ENABLE; in intelfbhw_program_mode()
1445 OUTREG(pipe_conf_reg, *pipe_conf | PIPECONF_ENABLE); in intelfbhw_program_mode()