Searched refs:MXS_SET_ADDR (Results 1 – 5 of 5) sorted by relevance
81 #define MXS_SET_ADDR 0x4 macro88 __raw_writel(mask, reg + MXS_SET_ADDR); in __mxs_setl()
141 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); in mxs_dma_reset_chan()144 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR); in mxs_dma_reset_chan()173 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); in mxs_dma_pause_chan()176 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR); in mxs_dma_pause_chan()583 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); in mxs_dma_init()585 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); in mxs_dma_init()590 mxs_dma->base + HW_APBHX_CTRL1 + MXS_SET_ADDR); in mxs_dma_init()
222 saif->base + SAIF_CTRL + MXS_SET_ADDR); in mxs_saif_put_mclk()278 saif->base + SAIF_CTRL + MXS_SET_ADDR); in mxs_saif_get_mclk()460 saif->base + SAIF_CTRL + MXS_SET_ADDR); in mxs_saif_prepare()485 master_saif->base + SAIF_CTRL + MXS_SET_ADDR); in mxs_saif_trigger()494 saif->base + SAIF_CTRL + MXS_SET_ADDR); in mxs_saif_trigger()
639 host->base + HW_SSP_CTRL0 + MXS_SET_ADDR); in mxs_mmc_enable_sdio_irq()641 host->base + HW_SSP_CTRL1 + MXS_SET_ADDR); in mxs_mmc_enable_sdio_irq()
70 DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_SET_ADDR); in mxs_saif_clkmux_select()