Searched refs:MMC_PAD_CFG (Results 1 – 2 of 2) sorted by relevance
80 #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ macro97 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()99 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()101 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()103 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()105 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); in mxc_mmc1_init()106 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); in mxc_mmc1_init()
104 #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ macro115 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG); in mxc_mmc1_init()116 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG); in mxc_mmc1_init()117 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG); in mxc_mmc1_init()118 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG); in mxc_mmc1_init()119 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); in mxc_mmc1_init()120 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG); in mxc_mmc1_init()