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Searched refs:MC417_RWD (Results 1 – 6 of 6) sorted by relevance

/linux-3.4.99/drivers/media/video/cx23885/
Dcx23885-417.c304 cx_write(MC417_RWD, regval); in cx23885_mc417_init()
313 mi_ready = cx_read(MC417_RWD) & MC417_MIRDY; in mc417_wait_ready()
334 cx_write(MC417_RWD, regval); in mc417_register_write()
338 cx_write(MC417_RWD, regval); in mc417_register_write()
343 cx_write(MC417_RWD, regval); in mc417_register_write()
345 cx_write(MC417_RWD, regval); in mc417_register_write()
350 cx_write(MC417_RWD, regval); in mc417_register_write()
352 cx_write(MC417_RWD, regval); in mc417_register_write()
357 cx_write(MC417_RWD, regval); in mc417_register_write()
359 cx_write(MC417_RWD, regval); in mc417_register_write()
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Dcimax2.c156 mem = cx_read(MC417_RWD); in netup_ci_get_mem()
164 cx_set(MC417_RWD, NETUP_CTRL_OFF); in netup_ci_get_mem()
203 cx_write(MC417_RWD, NETUP_CTRL_OFF | in netup_ci_op_cam()
205 cx_clear(MC417_RWD, NETUP_ADLO); in netup_ci_op_cam()
206 cx_write(MC417_RWD, NETUP_CTRL_OFF | in netup_ci_op_cam()
208 cx_clear(MC417_RWD, NETUP_ADHI); in netup_ci_op_cam()
213 cx_write(MC417_RWD, NETUP_CTRL_OFF | data); in netup_ci_op_cam()
216 cx_clear(MC417_RWD, in netup_ci_op_cam()
219 cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR); in netup_ci_op_cam()
Dcx23885-cards.c1089 cx_set(MC417_RWD, 0x00000002); in cx23885_gpio_setup()
1091 cx_clear(MC417_RWD, 0x00000800); in cx23885_gpio_setup()
1093 cx_set(MC417_RWD, 0x00000800); in cx23885_gpio_setup()
1118 cx_write(MC417_RWD, 0x0000c300); in cx23885_gpio_setup()
1215 cx_write(MC417_RWD, 0x00000d00); in cx23885_gpio_setup()
1353 data = ((cx_read(MC417_RWD)) & (~0x0000a000)); in netup_jtag_io()
1355 cx_write(MC417_RWD, data); in netup_jtag_io()
1359 cx_write(MC417_RWD, data | 0x00002000); in netup_jtag_io()
1362 cx_write(MC417_RWD, data); in netup_jtag_io()
Dcx23885-reg.h353 #define MC417_RWD 0x00110020 macro
Dcx23885-dvb.c629 mem = cx_read(MC417_RWD); in netup_altera_fpga_rw()
649 cx_write(MC417_RWD, mem); /* start RW cycle */ in netup_altera_fpga_rw()
652 mem = cx_read(MC417_RWD); in netup_altera_fpga_rw()
660 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS); in netup_altera_fpga_rw()
Dcx23885-core.c2014 cx_set(MC417_RWD, (mask & 0x0007fff8) >> 3); in cx23885_gpio_set()
2032 cx_clear(MC417_RWD, (mask & 0x7fff8) >> 3); in cx23885_gpio_clear()
2050 return (cx_read(MC417_RWD) & ((mask & 0x7fff8) >> 3)) << 3; in cx23885_gpio_get()